#define COLOUR_ALIGN(addr,pgoff)
((((addr)+SHMLBA-1)&~(SHMLBA-1)) +
@@ -32,25 +31,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
struct mm_struct *mm = current->mm;
struct vm_area_struct *vma;
unsigned long start_addr;
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
- unsigned int cache_type;
- int do_align = 0, aliasing = 0;
+ int do_align = 0;
+ int aliasing = cache_is_vipt_aliasing();
/*
* We only need to do colour alignment if either the I or D
- * caches alias. This is indicated by bits 9 and 21 of the
- * cache type register.
+ * caches alias.
*/
- cache_type = read_cpuid_cachetype();
- if (cache_type != read_cpuid_id()) {
- aliasing = (cache_type | cache_type >> 12) & (1 << 11);
- if (aliasing)
- do_align = filp || flags & MAP_SHARED;
- }
-#else
-#define do_align 0
-#define aliasing 0
-#endif
+ if (aliasing)
+ do_align = filp || (flags & MAP_SHARED);
/*
* We enforce the MAP_FIXED case.
--
1.7.5.4
--
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01-13-2012, 08:24 AM
Paolo Pisati
use cache type functions for arch_get_unmapped_area
From: Rob Herring <rob.herring@calxeda.com>
There are already cache type decoding functions, so use those instead
of custom decode code which only works for ARMv6.
BugLink: http://bugs.launchpad.net/bugs/861296
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com>
Acked-by: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
---
arch/arm/mm/mmap.c | 23 ++++++-----------------
1 files changed, 6 insertions(+), 17 deletions(-)
#define COLOUR_ALIGN(addr,pgoff)
((((addr)+SHMLBA-1)&~(SHMLBA-1)) +
@@ -31,25 +30,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
struct mm_struct *mm = current->mm;
struct vm_area_struct *vma;
unsigned long start_addr;
-#ifdef CONFIG_CPU_V6
- unsigned int cache_type;
- int do_align = 0, aliasing = 0;
+ int do_align = 0;
+ int aliasing = cache_is_vipt_aliasing();
/*
* We only need to do colour alignment if either the I or D
- * caches alias. This is indicated by bits 9 and 21 of the
- * cache type register.
+ * caches alias.
*/
- cache_type = read_cpuid_cachetype();
- if (cache_type != read_cpuid_id()) {
- aliasing = (cache_type | cache_type >> 12) & (1 << 11);
- if (aliasing)
- do_align = filp || flags & MAP_SHARED;
- }
-#else
-#define do_align 0
-#define aliasing 0
-#endif
+ if (aliasing)
+ do_align = filp || (flags & MAP_SHARED);
/*
* We enforce the MAP_FIXED case.
--
1.7.5.4
--
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01-13-2012, 08:37 AM
Stefan Bader
use cache type functions for arch_get_unmapped_area
On 13.01.2012 10:24, Paolo Pisati wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> There are already cache type decoding functions, so use those instead
> of custom decode code which only works for ARMv6.
>
> BugLink: http://bugs.launchpad.net/bugs/861296
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Acked-by: Nicolas Pitre <nico@linaro.org>
> Acked-by: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com>
> Acked-by: Seth Forshee <seth.forshee@canonical.com>
> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
> ---
> arch/arm/mm/mmap.c | 23 ++++++-----------------
> 1 files changed, 6 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
> index 4f5b396..0cbf50b 100644
> --- a/arch/arm/mm/mmap.c
> +++ b/arch/arm/mm/mmap.c
> @@ -8,8 +8,7 @@
> #include <linux/sched.h>
> #include <linux/io.h>
> #include <linux/random.h>
> -#include <asm/cputype.h>
> -#include <asm/system.h>
> +#include <asm/cachetype.h>
>
> #define COLOUR_ALIGN(addr,pgoff)
> ((((addr)+SHMLBA-1)&~(SHMLBA-1)) +
> @@ -31,25 +30,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
> struct mm_struct *mm = current->mm;
> struct vm_area_struct *vma;
> unsigned long start_addr;
> -#ifdef CONFIG_CPU_V6
> - unsigned int cache_type;
> - int do_align = 0, aliasing = 0;
> + int do_align = 0;
> + int aliasing = cache_is_vipt_aliasing();
>
> /*
> * We only need to do colour alignment if either the I or D
> - * caches alias. This is indicated by bits 9 and 21 of the
> - * cache type register.
> + * caches alias.
> */
> - cache_type = read_cpuid_cachetype();
> - if (cache_type != read_cpuid_id()) {
> - aliasing = (cache_type | cache_type >> 12) & (1 << 11);
> - if (aliasing)
> - do_align = filp || flags & MAP_SHARED;
> - }
> -#else
> -#define do_align 0
> -#define aliasing 0
> -#endif
> + if (aliasing)
> + do_align = filp || (flags & MAP_SHARED);
>
> /*
> * We enforce the MAP_FIXED case.
Seems to be
commit 41dfaa934c5d866d626de9bea785e6168524a47e
Author: Rob Herring <rob.herring@calxeda.com>
Date: Tue Nov 22 04:01:06 2011 +0100
ARM: 7168/1: use cache type functions for arch_get_unmapped_area
Think it would be good to add backported-from or cherry-picked line
--
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01-13-2012, 08:55 AM
Paolo Pisati
use cache type functions for arch_get_unmapped_area
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
On 01/13/2012 10:37 AM, Stefan Bader wrote:
>
> Seems to be
>
> commit 41dfaa934c5d866d626de9bea785e6168524a47e Author: Rob Herring
> <rob.herring@calxeda.com> Date: Tue Nov 22 04:01:06 2011 +0100
>
> ARM: 7168/1: use cache type functions for arch_get_unmapped_area
>
> Think it would be good to add backported-from or cherry-picked
> line
yes, i picked them from the ti-omap4 branch where they were already
applied.
- --
bye,
p.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
#define COLOUR_ALIGN(addr,pgoff)
((((addr)+SHMLBA-1)&~(SHMLBA-1)) +
@@ -32,25 +31,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
struct mm_struct *mm = current->mm;
struct vm_area_struct *vma;
unsigned long start_addr;
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
- unsigned int cache_type;
- int do_align = 0, aliasing = 0;
+ int do_align = 0;
+ int aliasing = cache_is_vipt_aliasing();
/*
* We only need to do colour alignment if either the I or D
- * caches alias. This is indicated by bits 9 and 21 of the
- * cache type register.
+ * caches alias.
*/
- cache_type = read_cpuid_cachetype();
- if (cache_type != read_cpuid_id()) {
- aliasing = (cache_type | cache_type >> 12) & (1 << 11);
- if (aliasing)
- do_align = filp || flags & MAP_SHARED;
- }
-#else
-#define do_align 0
-#define aliasing 0
-#endif
+ if (aliasing)
+ do_align = filp || (flags & MAP_SHARED);
/*
* We enforce the MAP_FIXED case.
--
1.7.5.4
--
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