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Old 01-19-2011, 04:10 PM
Volker Armin Hemmann
 
Default Microcode update AMD

btw, very related:

http://blog.flameeyes.eu/2011/01/17/microupdates-for-microcodes
 
Old 01-19-2011, 11:53 PM
walt
 
Default Microcode update AMD

On 01/17/2011 11:12 AM, Volker Armin Hemmann wrote:


alsmost all bios load the microcode automatically.


I've known for years what microcode is and what it does, but the idea
of updating it is a complete surprise to me.

From where does the bios get the microcode that it loads?
 
Old 01-20-2011, 12:08 AM
walt
 
Default Microcode update AMD

On 01/19/2011 04:53 PM, walt wrote:

On 01/17/2011 11:12 AM, Volker Armin Hemmann wrote:


alsmost all bios load the microcode automatically.


I've known for years what microcode is and what it does, but the idea
of updating it is a complete surprise to me.

From where does the bios get the microcode that it loads?


Oops, please disregard. Your link to flameyes's blog answers my question.
 
Old 02-05-2011, 12:34 PM
Enrico Weigelt
 
Default Microcode update AMD

* Volker Armin Hemmann <volkerarmin@googlemail.com> wrote:

> the CPU. All CPUs use microcode. For decades. Google, or go straight to
> wikipedia.
> http://en.wikipedia.org/wiki/Microcode

Borroughs' large systems (b6500+) were designed as microcode
machines from ground up, which essentially interpreted an algol
bytecode (the whole OS was directly implemented in assembler,
w/o any machine specific assembler code). Paired w/ their entirely
stack-based architecture (there were no program-visible registers)
they could easily do massive-multiprocessing (everything's reentrant
by design), 24/7 uptime even w/ hw replacements/upgrades and
cpu improvements w/o ever having to recompile.

Their successors (now Unisys) are called emode machines - quite
the same approach as nowadays w/ Java (interpreter/JIT).


BTW: I'm currently designing an emode/microcode-base computer
architecture built on an matrix of nanocores, they don't have a
concept of main memory, instead a relatively large (linear
addressable) register memory, part of the register space is
shared with neighbours (multiport-RAMs). These are programmed
by an horizontal microcode, which is decoded by an static demux,
that directly connects registers to an micro-ALU (so there're
no additional load+store cycles) ...


cu
--
----------------------------------------------------------------------
Enrico Weigelt, metux IT service -- http://www.metux.de/

phone: +49 36207 519931 email: weigelt@metux.de
mobile: +49 151 27565287 icq: 210169427 skype: nekrad666
----------------------------------------------------------------------
Embedded-Linux / Portierung / Opensource-QM / Verteilte Systeme
----------------------------------------------------------------------
 
Old 02-05-2011, 01:28 PM
Enrico Weigelt
 
Default Microcode update AMD

* Volker Armin Hemmann <volkerarmin@googlemail.com> wrote:

> and that is all the intel stuff. For AMD all you have to do is:
> modprobe -r microcode && modprobe microcode

Is the microcode permanently flashed or loaded into some
internal RAM ?


cu
--
----------------------------------------------------------------------
Enrico Weigelt, metux IT service -- http://www.metux.de/

phone: +49 36207 519931 email: weigelt@metux.de
mobile: +49 151 27565287 icq: 210169427 skype: nekrad666
----------------------------------------------------------------------
Embedded-Linux / Portierung / Opensource-QM / Verteilte Systeme
----------------------------------------------------------------------
 
Old 02-05-2011, 02:26 PM
 
Default Microcode update AMD

Enrico Weigelt <weigelt@metux.de> [11-02-05 16:08]:
> * Volker Armin Hemmann <volkerarmin@googlemail.com> wrote:
>
> > and that is all the intel stuff. For AMD all you have to do is:
> > modprobe -r microcode && modprobe microcode
>
> Is the microcode permanently flashed or loaded into some
> internal RAM ?
>
>
> cu
> --
> ----------------------------------------------------------------------
> Enrico Weigelt, metux IT service -- http://www.metux.de/
>
> phone: +49 36207 519931 email: weigelt@metux.de
> mobile: +49 151 27565287 icq: 210169427 skype: nekrad666
> ----------------------------------------------------------------------
> Embedded-Linux / Portierung / Opensource-QM / Verteilte Systeme
> ----------------------------------------------------------------------
>

You need a kernel module to load the microcode into the CPU (I dont
know for sure what kind of memory holds it then) eacht time you boot
the machine.

Best regards
mcc
 
Old 02-05-2011, 03:15 PM
Florian Philipp
 
Default Microcode update AMD

Am 05.02.2011 14:34, schrieb Enrico Weigelt:
>
> BTW: I'm currently designing an emode/microcode-base computer
> architecture built on an matrix of nanocores, they don't have a
> concept of main memory, instead a relatively large (linear
> addressable) register memory, part of the register space is
> shared with neighbours (multiport-RAMs). These are programmed
> by an horizontal microcode, which is decoded by an static demux,
> that directly connects registers to an micro-ALU (so there're
> no additional load+store cycles) ...
>
>
> cu

Interesting. Is there a paper on this?

What's its intended purpose?

Regards,
Florian Philipp
 
Old 02-05-2011, 04:07 PM
Volker Armin Hemmann
 
Default Microcode update AMD

On Saturday 05 February 2011 15:28:22 Enrico Weigelt wrote:
> * Volker Armin Hemmann <volkerarmin@googlemail.com> wrote:
> > and that is all the intel stuff. For AMD all you have to do is:
> > modprobe -r microcode && modprobe microcode
>
> Is the microcode permanently flashed or loaded into some
> internal RAM ?

loaded. microcode is never permanently changed on x86 derivates.
 
Old 02-06-2011, 10:36 AM
Volker Armin Hemmann
 
Default Microcode update AMD

On Saturday 05 February 2011 15:28:22 Enrico Weigelt wrote:
> * Volker Armin Hemmann <volkerarmin@googlemail.com> wrote:
> > and that is all the intel stuff. For AMD all you have to do is:
> > modprobe -r microcode && modprobe microcode
>
> Is the microcode permanently flashed or loaded into some
> internal RAM ?

loaded. microcode is never permanently changed on x86 derivates.
 

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