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Old 04-30-2012, 04:10 PM
Stan Sander
 
Default Invalid opcode

This isn't really a hardened issue specifically, but since that's the
profile I'm running and this is the list that I'm already subscribed to,
thought I'd go ahead and post here. See if one of you folks can offer
some suggestions for me.

I have a old Pentium 4 machine with a fresh stable amd64 hardened
install that I am planning to use as a dedicated Asterisk server.
Everything seems fine with one exception. I cannot unmerge any
packages. Neither --depclean or -C will work. They both bomb out as
soon as the 5 second countdown starts. The message said Invalid
instruction and the syslog indicated it was in time.so

klogd: emerge[28440] trap invalid opcode ip:2612992f7ac sp:3bbcc5cea60
error:0 in time.so[2612992d000+4000]

Then as I was working on asterisk when I got to the point where I was
configuring voicemail and was trying to record the name from a phone
extension, asterisk crashed after starting the recording. It will limit
the length of the recording to just a few seconds, so the common factor
here seems to be related to counting seconds. Here is the message from
syslog about Asterisk.

klogd: asterisk[2794] trap invalid opcode ip:1bd2a5e33a sp:2bb49ccdeb0
error:0 in asterisk[1bd29a3000+202000]

I did some poking around with google and so far haven't come up with
anything too useful. I ran memtest86+ for around 11 hours and it didn't
come up with any errors. So, I'm thinking I've got something borked in
my USE flags or system config, but I really don't know what it could
be. The system seems stable and the problem isn't random. Anyone have
ideas on what I can try to get this resolved? Here is the cpuinfo in
case that is helpful.....

cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Pentium(R) 4 CPU 3.00GHz
stepping : 3
microcode : 0x5
cpu MHz : 2992.342
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 5
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe
syscall nx lm constant_tsc pebs bts nopl pni dtes64 monitor ds_cpl est
cid cx16 xtpr
bogomips : 5984.68
clflush size : 64
cache_alignment : 128
address sizes : 36 bits physical, 48 bits virtual
power management:

processor : 1
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Pentium(R) 4 CPU 3.00GHz
stepping : 3
microcode : 0x5
cpu MHz : 2992.342
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 5
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe
syscall nx lm constant_tsc pebs bts nopl pni dtes64 monitor ds_cpl est
cid cx16 xtpr
bogomips : 5984.74
clflush size : 64
cache_alignment : 128
address sizes : 36 bits physical, 48 bits virtual
power management:

--
Stan & HD Tashi Grad 10/08 Edgewood, NM SWR
PR - Cindy and Jenny - Sammamish, WA NWR
http://www.cci.org
 
Old 05-01-2012, 03:09 AM
"Anthony G. Basile"
 
Default Invalid opcode

On 04/30/2012 12:10 PM, Stan Sander wrote:

trap invalid opcode


Two possibilities: 1) the running program aims its instruction pointer
at some garbage. I doubt it in this case. 2) Uour binaries make use of
op codes that your hardware is not able to handle, like I noticed your
cpu doesn't support ssse3 or sse4. So, for example, if some use flag
triggers code to be compiled that needs those instructions sets, and
you're cpu doesn't support them, you'll hit this error.


What's missing is your global CFLAGS, CXXFLAGS, CHOST, USE and any other
goodies that might affect how your binaries are getting built.



--
Anthony G. Basile, Ph. D.
Chair of Information Technology
D'Youville College
Buffalo, NY 14201
(716) 829-8197
 
Old 05-01-2012, 02:02 PM
Stan Sander
 
Default Invalid opcode

On 04/30/2012 09:09 PM, Anthony G. Basile wrote:
> On 04/30/2012 12:10 PM, Stan Sander wrote:
>> trap invalid opcode
>
> Two possibilities: 1) the running program aims its instruction pointer
> at some garbage. I doubt it in this case. 2) Uour binaries make use
> of op codes that your hardware is not able to handle, like I noticed
> your cpu doesn't support ssse3 or sse4. So, for example, if some use
> flag triggers code to be compiled that needs those instructions sets,
> and you're cpu doesn't support them, you'll hit this error.
>
> What's missing is your global CFLAGS, CXXFLAGS, CHOST, USE and any
> other goodies that might affect how your binaries are getting built.
>
>

Anthony,

Thanks for the response. I did some more searching and reading and came
to the conclusion the root cause is #2, and I've made a change in my
CFLAGS to use -march=native. I'm in the process of an emerge -e just to
make sure nothing remains with the old flags. I'll post back how it
goes, but it seemed to be a good change to try since it sets/unsets
various flags that could lead to the opcode errors.

--
Stan & HD Tashi Grad 10/08 Edgewood, NM SWR
PR - Cindy and Jenny - Sammamish, WA NWR
http://www.cci.org
 

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