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Old 08-25-2011, 10:11 AM
"J.Hwan Kim"
 
Default How to distribute IRQs to all cores

Hi, everyone

The interrupts of my ixgbevf driver occurs only Core 0
although the user space "irqbalance" serivce is working.

How can I distribute the interrupt of RX in ixgbevf to all cores?

cat /proc/interrupts | grep "isv"
97: 8 0 0 0 0
0 0 0 PCI-MSI-edge isv0-rx-0
99: 7 0 0 0 0
0 0 0 PCI-MSI-edge isv0:lsc
103: 2059 0 0 0 0
0 0 0 PCI-MSI-edge isv2-rx-0
104: 14 0 0 0 0
0 0 0 PCI-MSI-edge isv2-tx-0
105: 1 0 0 0 0
0 0 0 PCI-MSI-edge isv2:mbx


"isv" is netdevice name of my ixgbevf.



Thanks in advance.

Best Regards,

J.Hwan Kim


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Old 08-25-2011, 11:40 PM
Stan Hoeppner
 
Default How to distribute IRQs to all cores

On 8/25/2011 5:11 AM, J.Hwan Kim wrote:
> Hi, everyone
>
> The interrupts of my ixgbevf driver occurs only Core 0
> although the user space "irqbalance" serivce is working.

Calling irqbalance a user space service shows a serious lack of
understanding of how irqbalance works.

> How can I distribute the interrupt of RX in ixgbevf to all cores?

This should already be working over at least 4 cores if this is a dual
socket quad core machine, and 8 cores if this is a single socket system
with an 8 core CPU with a single shared L3, such as AMD's 8 core Magny
Cours. Something obviously broken.

irqbalance collects relevant data and builds a new IRQ routing table,
which it then makes available to the system chipset to use in lieu of
the default table. The new routing table is the "magic" of irqbalance.
The running daemon gains little, hence the "--oneshot" option.

If it is not working correctly, then I would guess that the system
chipset is not being reprogrammed with the new routing table.

You should investigate why irqbalance isn't successfully programming the
chipset with the new table.

--
Stan


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