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Jonathan Nieder 09-29-2012 09:44 PM

Bug#689178: No support for modern nVidia cards (GT 610) - System unusable!
 
# basic hardware support
severity 689178 important
tags 689178 + upstream
found 689178 linux-2.6/2.6.32-46
quit

Hi Kees,

Kees de Jong wrote:

> The Debian installer installs the nouveau driver by default. But this driver
> doesn't appear have support for my new nVidia GT 610.

That's an nve0. Support was added in v3.5-rc1~100^2^2~43
(drm/nve0/gr: initial implementation, 2012-03-13) and surrounding
commits. Could you try a 3.5.y kernel from experimental and let us
know how it goes?

If it doesn't work, then we can work with upstream to fix it. If it
does work, then we can try to backport the support for wheezy if you
have time to test patches. Either result is a win.

Thanks for writing, and hope that helps.

Sincerely,
Jonathan


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Kees de Jong 09-30-2012 07:01 PM

Bug#689178: No support for modern nVidia cards (GT 610) - System unusable!
 
On za, 2012-09-29 at 14:44 -0700, Jonathan Nieder wrote:
> Could you try a 3.5.y kernel from experimental and let us
> know how it goes?

Hi Jonathan,


I'll let you know within 72 hours.


Kind regards,
Kees

Kees de Jong 10-01-2012 08:02 AM

Bug#689178: No support for modern nVidia cards (GT 610) - System unusable!
 
I was able to recreate the error by reverting back to the Nouveau
driver. It still crashes with the 3.2.0-3-amd64 kernel, but it works
with the 3.5-trunk-amd64 kernel. Although I'm only able to use the
'fall-back' mode of Gnome 3. This is probably due to the fact that
Nouveau doesn't have hardware acceleration yet? I'm more than willing
to test out any patches. Thanks!


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Jonathan Nieder 10-01-2012 12:30 PM

Bug#689178: No support for modern nVidia cards (GT 610) - System unusable!
 
Kees de Jong wrote:

> I was able to recreate the error by reverting back to the Nouveau
> driver. It still crashes with the 3.2.0-3-amd64 kernel, but it works
> with the 3.5-trunk-amd64 kernel. Although I'm only able to use the
> 'fall-back' mode of Gnome 3.

Nice. What happens if you boot with the parameter "nouveau.noaccel=0"
appended to the kernel command line?

I'd also be interested in full "dmesg" output (as an attachment) from
booting the 3.5.y kernel and starting X with "drm.debug=0xe" and
"log_buf_len=16M" parameters appended to the kernel command line
(without noaccel=0).

By the way, looks like I was confused before --- your card is an nvd9,
not nve0.


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Sven Joachim 10-01-2012 03:40 PM

Bug#689178: No support for modern nVidia cards (GT 610) - System unusable!
 
On 2012-10-01 14:30 +0200, Jonathan Nieder wrote:

> Kees de Jong wrote:
>
>> I was able to recreate the error by reverting back to the Nouveau
>> driver. It still crashes with the 3.2.0-3-amd64 kernel, but it works
>> with the 3.5-trunk-amd64 kernel. Although I'm only able to use the
>> 'fall-back' mode of Gnome 3.
>
> Nice. What happens if you boot with the parameter "nouveau.noaccel=0"
> appended to the kernel command line?
>
> I'd also be interested in full "dmesg" output (as an attachment) from
> booting the 3.5.y kernel and starting X with "drm.debug=0xe" and
> "log_buf_len=16M" parameters appended to the kernel command line
> (without noaccel=0).
>
> By the way, looks like I was confused before --- your card is an nvd9,
> not nve0.

And that's the reason for the missing acceleration, there is still no
working free microcode for NVD9. :-( Search for "case 0xd9:" in
drivers/gpu/drm/nouveau/nouveau_state.c.

It is possible to extract firmware from the blob, but the procedure is
rather complicated╣.

Cheers,
Sven


╣ http://nouveau.freedesktop.org/wiki/NVC0_Firmware


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Kees de Jong 10-01-2012 09:49 PM

Bug#689178: No support for modern nVidia cards (GT 610) - System unusable!
 
Hi Jonathan,


I'm still forced to the Gnome fall-back mode with nouveau.noaccel=0 as
kernel parameter. In the attachment is the dmesg output you requested
with the other parameters. Hope it helps.


Kind regards,
Kees
[ 6.056426] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061B030, Data: 0x000415E5
[ 6.056428] [drm] nouveau 0000:01:00.0: 0x737C: [ (0x7A) - INIT_ZM_REG ]
[ 6.056429] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C080, Data: 0x00000000
[ 6.056431] [drm] nouveau 0000:01:00.0: 0x7385: [ (0x7A) - INIT_ZM_REG ]
[ 6.056433] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C084, Data: 0x00000000
[ 6.056435] [drm] nouveau 0000:01:00.0: 0x738E: [ (0x53) - INIT_ZM_CR ]
[ 6.056437] [drm] nouveau 0000:01:00.0: Indexed IO write: Port: 0x03D4, Index: 0x85, Head: 0x00, Data: 0xFF
[ 6.056439] [drm] nouveau 0000:01:00.0: 0x7391: [ (0x71) - INIT_DONE ]
[ 6.056440] [drm] nouveau 0000:01:00.0: 0x8A4A: End of 0x7332 subroutine
[ 6.056442] [drm] nouveau 0000:01:00.0: 0x8A4D: [ (0x7A) - INIT_ZM_REG ]
[ 6.056444] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0008A088, Data: 0x11010003
[ 6.056446] [drm] nouveau 0000:01:00.0: 0x8A56: [ (0x6E) - INIT_NV_REG ]
[ 6.056448] [drm] nouveau 0000:01:00.0: 0x8A56: Reg: 0x0000E1B8, Mask: 0xFFFFFFFF, Data: 0x00000000
[ 6.056451] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0000E1B8, Data: 0xFFFFFFFF
[ 6.056452] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0000E1B8, Data: 0xFFFFFFFF
[ 6.056454] [drm] nouveau 0000:01:00.0: 0x8A63: [ (0x7A) - INIT_ZM_REG ]
[ 6.056456] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00022680, Data: 0x80000014
[ 6.056458] [drm] nouveau 0000:01:00.0: 0x8A6C: [ (0x7A) - INIT_ZM_REG ]
[ 6.056459] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0013C054, Data: 0x00000002
[ 6.056461] [drm] nouveau 0000:01:00.0: 0x8A75: [ (0x7A) - INIT_ZM_REG ]
[ 6.056463] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0013B054, Data: 0x00000002
[ 6.056465] [drm] nouveau 0000:01:00.0: 0x8A7E: [ (0x7A) - INIT_ZM_REG ]
[ 6.056466] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0013C844, Data: 0x00000002
[ 6.056468] [drm] nouveau 0000:01:00.0: 0x8A87: [ (0x74) - INIT_TIME ]
[ 6.056470] [drm] nouveau 0000:01:00.0: 0x8A87: Sleeping for 0x0010 microseconds
[ 6.056488] [drm] nouveau 0000:01:00.0: 0x8A8A: [ (0x6E) - INIT_NV_REG ]
[ 6.056490] [drm] nouveau 0000:01:00.0: 0x8A8A: Reg: 0x0010F400, Mask: 0xFFFFFFE0, Data: 0x00000007
[ 6.056493] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0010F400, Data: 0x00001707
[ 6.056494] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F400, Data: 0x00001707
[ 6.056496] [drm] nouveau 0000:01:00.0: 0x8A97: [ (0x7A) - INIT_ZM_REG ]
[ 6.056498] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F410, Data: 0x00000307
[ 6.056500] [drm] nouveau 0000:01:00.0: 0x8AA0: [ (0x7A) - INIT_ZM_REG ]
[ 6.056502] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F420, Data: 0x00000042
[ 6.056503] [drm] nouveau 0000:01:00.0: 0x8AA9: [ (0x7A) - INIT_ZM_REG ]
[ 6.056505] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F430, Data: 0x00000040
[ 6.056507] [drm] nouveau 0000:01:00.0: 0x8AB2: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
[ 6.056509] [drm] nouveau 0000:01:00.0: 0x8AB2: BaseReg: 0x0010F440, Count: 0x02
[ 6.056510] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F440, Data: 0x22F84F10
[ 6.056512] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F444, Data: 0x04CC001F
[ 6.056514] [drm] nouveau 0000:01:00.0: 0x8AC0: [ (0x7A) - INIT_ZM_REG ]
[ 6.056516] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F468, Data: 0x00001005
[ 6.056517] [drm] nouveau 0000:01:00.0: 0x8AC9: [ (0x7A) - INIT_ZM_REG ]
[ 6.056519] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010F4B4, Data: 0x00000000
[ 6.056521] [drm] nouveau 0000:01:00.0: 0x8AD2: [ (0x74) - INIT_TIME ]
[ 6.056523] [drm] nouveau 0000:01:00.0: 0x8AD2: Sleeping for 0x000A microseconds
[ 6.056534] [drm] nouveau 0000:01:00.0: 0x8AD5: [ (0x7A) - INIT_ZM_REG ]
[ 6.056536] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00132900, Data: 0x00000001
[ 6.056538] [drm] nouveau 0000:01:00.0: 0x8ADE: [ (0x7A) - INIT_ZM_REG ]
[ 6.056540] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010ECC0, Data: 0x00000000
[ 6.056541] [drm] nouveau 0000:01:00.0: 0x8AE7: [ (0x7A) - INIT_ZM_REG ]
[ 6.056543] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0010ECC4, Data: 0xFFFFFFFF
[ 6.056545] [drm] nouveau 0000:01:00.0: 0x8AF0: [ (0x6E) - INIT_NV_REG ]
[ 6.056547] [drm] nouveau 0000:01:00.0: 0x8AF0: Reg: 0x00022400, Mask: 0xFFFFF7FF, Data: 0x00000000
[ 6.056550] [drm] nouveau 0000:01:00.0: Read: Reg: 0x00022400, Data: 0x00000000
[ 6.056552] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00022400, Data: 0x00000000
[ 6.056554] [drm] nouveau 0000:01:00.0: 0x8AFD: [ (0x6E) - INIT_NV_REG ]
[ 6.056556] [drm] nouveau 0000:01:00.0: 0x8AFD: Reg: 0x00020210, Mask: 0xFFFFFFFC, Data: 0x00000001
[ 6.056559] [drm] nouveau 0000:01:00.0: Read: Reg: 0x00020210, Data: 0x27722445
[ 6.056560] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00020210, Data: 0x27722445
[ 6.056562] [drm] nouveau 0000:01:00.0: 0x8B0A: [ (0x6E) - INIT_NV_REG ]
[ 6.056564] [drm] nouveau 0000:01:00.0: 0x8B0A: Reg: 0x00020214, Mask: 0xFFFFFFFC, Data: 0x00000001
[ 6.056567] [drm] nouveau 0000:01:00.0: Read: Reg: 0x00020214, Data: 0x27722445
[ 6.056569] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00020214, Data: 0x27722445
[ 6.056570] [drm] nouveau 0000:01:00.0: 0x8B17: [ (0x6E) - INIT_NV_REG ]
[ 6.056573] [drm] nouveau 0000:01:00.0: 0x8B17: Reg: 0x0017E858, Mask: 0xFFFF8BFF, Data: 0x00000000
[ 6.056576] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0017E858, Data: 0xFC400030
[ 6.056577] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0017E858, Data: 0xFC400030
[ 6.056579] [drm] nouveau 0000:01:00.0: 0x8B24: [ (0x7A) - INIT_ZM_REG ]
[ 6.056581] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0017E878, Data: 0x000000FF
[ 6.056583] [drm] nouveau 0000:01:00.0: 0x8B2D: [ (0x6E) - INIT_NV_REG ]
[ 6.056585] [drm] nouveau 0000:01:00.0: 0x8B2D: Reg: 0x0002240C, Mask: 0xFFFFFFFD, Data: 0x00000002
[ 6.056588] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0002240C, Data: 0x00000002
[ 6.056590] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0002240C, Data: 0x00000002
[ 6.056591] [drm] nouveau 0000:01:00.0: 0x8B3A: [ (0x71) - INIT_DONE ]
[ 6.056593] [drm] nouveau 0000:01:00.0: Parsing VBIOS init table 4 at offset 0x8B3B
[ 6.056595] [drm] nouveau 0000:01:00.0: 0x8B3B: ------ Executing following commands ------
[ 6.056597] [drm] nouveau 0000:01:00.0: 0x8B3B: [ (0x71) - INIT_DONE ]
[ 6.056598] [drm] nouveau 0000:01:00.0: Parsing VBIOS init table at offset 0x8BA0
[ 6.056600] [drm] nouveau 0000:01:00.0: 0x8BA0: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.056602] [drm] nouveau 0000:01:00.0: 0x8BA0: Executing subroutine at 0x7392
[ 6.056603] [drm] nouveau 0000:01:00.0: 0x7392: [ (0x56) - INIT_CONDITION_TIME ]
[ 6.056605] [drm] nouveau 0000:01:00.0: 0x7392: Condition: 0x02, Retries: 0x64
[ 6.056607] [drm] nouveau 0000:01:00.0: 0x7392: Cond: 0x02, Reg: 0x0061000C, Mask: 0x80000000
[ 6.056610] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061000C, Data: 0x00000200
[ 6.056612] [drm] nouveau 0000:01:00.0: 0x7392: Checking if 0x00000000 equals 0x80000000
[ 6.056613] [drm] nouveau 0000:01:00.0: 0x7392: Condition not met, sleeping for 20ms
[ 6.076457] [drm] nouveau 0000:01:00.0: 0x7392: Cond: 0x02, Reg: 0x0061000C, Mask: 0x80000000
[ 6.076460] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061000C, Data: 0x00000200
[ 6.076462] [drm] nouveau 0000:01:00.0: 0x7392: Checking if 0x00000000 equals 0x80000000
[ 6.076464] [drm] nouveau 0000:01:00.0: 0x7392: Condition still not met after 20ms, skipping following opcodes
[ 6.076466] [drm] nouveau 0000:01:00.0: 0x7395: [ (0x72) - INIT_RESUME ]
[ 6.076467] [drm] nouveau 0000:01:00.0: 0x7395: ---- Executing following commands ----
[ 6.076469] [drm] nouveau 0000:01:00.0: 0x7396: [ (0x5F) - INIT_COPY_NV_REG ]
[ 6.076472] [drm] nouveau 0000:01:00.0: 0x7396: SrcReg: 0x00610000, Shift: 0x00, SrcMask: 0x0000FFFF, Xor: 0x40000000, DstReg: 0x0061000C, DstMask: 0xBFFF0000
[ 6.076475] [drm] nouveau 0000:01:00.0: Read: Reg: 0x00610000, Data: 0x907D0200
[ 6.076477] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061000C, Data: 0x00000200
[ 6.076479] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061000C, Data: 0x40000200
[ 6.076481] [drm] nouveau 0000:01:00.0: 0x73AC: [ (0x56) - INIT_CONDITION_TIME ]
[ 6.076483] [drm] nouveau 0000:01:00.0: 0x73AC: Condition: 0x03, Retries: 0x64
[ 6.076485] [drm] nouveau 0000:01:00.0: 0x73AC: Cond: 0x03, Reg: 0x0061000C, Mask: 0x40000000
[ 6.076487] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061000C, Data: 0x00000200
[ 6.076489] [drm] nouveau 0000:01:00.0: 0x73AC: Checking if 0x00000000 equals 0x00000000
[ 6.076490] [drm] nouveau 0000:01:00.0: 0x73AC: Condition met, continuing
[ 6.076492] [drm] nouveau 0000:01:00.0: 0x73AC: Cond: 0x03, Reg: 0x0061000C, Mask: 0x40000000
[ 6.076495] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061000C, Data: 0x00000200
[ 6.076497] [drm] nouveau 0000:01:00.0: 0x73AC: Checking if 0x00000000 equals 0x00000000
[ 6.076499] [drm] nouveau 0000:01:00.0: 0x73AF: [ (0x72) - INIT_RESUME ]
[ 6.076500] [drm] nouveau 0000:01:00.0: 0x73B0: [ (0x71) - INIT_DONE ]
[ 6.076502] [drm] nouveau 0000:01:00.0: 0x8BA0: End of 0x7392 subroutine
[ 6.076504] [drm] nouveau 0000:01:00.0: 0x8BA3: [ (0x71) - INIT_DONE ]
[ 6.076506] [drm] nouveau 0000:01:00.0: Searching for output entry for 0 0 2
[ 6.076508] [drm] nouveau 0000:01:00.0: output script 0 not found
[ 6.076509] [drm] nouveau 0000:01:00.0: Searching for output entry for 2 0 1
[ 6.076511] [drm] nouveau 0000:01:00.0: 0x5A9D: parsing output script 0
[ 6.076513] [drm] nouveau 0000:01:00.0: 0x5A9D: [ (0x71) - INIT_DONE ]
[ 6.076515] [drm] nouveau 0000:01:00.0: Searching for output entry for 2 0 2
[ 6.076516] [drm] nouveau 0000:01:00.0: 0x5A9D: parsing output script 0
[ 6.076518] [drm] nouveau 0000:01:00.0: 0x5A9D: [ (0x71) - INIT_DONE ]
[ 6.076520] [drm] nouveau 0000:01:00.0: Searching for output entry for 0 0 4
[ 6.076521] [drm] nouveau 0000:01:00.0: output script 0 not found
[ 6.076548] [drm] nouveau 0000:01:00.0: nvc0_vram_init:116 - 0x100800: 0x00000001
[ 6.076551] [drm] nouveau 0000:01:00.0: nvc0_vram_init:117 - parts 0x00000001 mask 0x00000000
[ 6.076560] [drm] nouveau 0000:01:00.0: nvc0_vram_init:132 - 0: mem_amount 0x00000400
[ 6.076563] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_init:213 -
[ 6.076567] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=65536 align=0 flags=0x00000003
[ 6.076570] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff8801390cd140
[ 6.077626] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=32768 align=4096 flags=0x00000002
[ 6.077629] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff880139967f40
[ 6.078160] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=8192 align=4096 flags=0x00000000
[ 6.078162] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff880139967e40
[ 6.078179] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=32768 align=4096 flags=0x00000002
[ 6.078181] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff880139967d40
[ 6.078723] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=8192 align=4096 flags=0x00000000
[ 6.078725] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff880139967c40
[ 6.078838] [TTM] Zone kernel: Available graphics memory: 2031414 kiB
[ 6.078839] [TTM] Initializing pool allocator
[ 6.078844] [TTM] Initializing DMA pool allocator
[ 6.078854] [drm] nouveau 0000:01:00.0: Detected 1024MiB VRAM (DDR3)
[ 6.078861] mtrr: type mismatch for d8000000,8000000 old: write-back new: write-combining
[ 6.078872] [drm] nouveau 0000:01:00.0: 512 MiB GART (aperture)
[ 6.078913] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=262144 align=4096 flags=0x00000002
[ 6.078915] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff880139e64140
[ 6.081266] [drm] nouveau 0000:01:00.0: nouveau_connector_create:909 -
[ 6.081311] [drm] nouveau 0000:01:00.0: nouveau_connector_create:909 -
[ 6.081314] [drm] nouveau 0000:01:00.0: nouveau_connector_create:909 -
[ 6.081344] [drm] nouveau 0000:01:00.0: nouveau_connector_create:909 -
[ 6.081398] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=16384 align=65536 flags=0x00000002
[ 6.081401] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff880139471bc0
[ 6.081611] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[ 6.081612] [drm] No driver support for vblank timestamp query.
[ 6.081679] [drm] nouveau 0000:01:00.0: nouveau_i2c_identify:383 - Probing monitoring devices on I2C bus: 2
[ 6.087015] [drm] nouveau 0000:01:00.0: nouveau_i2c_identify:392 - No devices found.
[ 6.087193] [drm] nouveau 0000:01:00.0: nvc0_mem_timing_calc:632 - Entry 0: 290: 07202d15 4c71c286 66070411 0000226f
[ 6.087195] [drm] nouveau 0000:01:00.0: nvc0_mem_timing_calc:633 - 2a0: 42e28069
[ 6.087197] [drm] nouveau 0000:01:00.0: nouveau_mem_ddr3_mr:725 - (0) MR: 00001620 00200080
[ 6.087206] [drm] nouveau 0000:01:00.0: nvc0_mem_timing_calc:632 - Entry 0: 290: 09304a21 4c924389 660a0511 00002891
[ 6.087207] [drm] nouveau 0000:01:00.0: nvc0_mem_timing_calc:633 - 2a0: 42e20069
[ 6.087209] [drm] nouveau 0000:01:00.0: nouveau_mem_ddr3_mr:725 - (0) MR: 00001a50 00200090
[ 6.087214] [drm] nouveau 0000:01:00.0: 2 available performance level(s)
[ 6.087217] [drm] nouveau 0000:01:00.0: 1: core 270MHz shader 540MHz memory 405MHz voltage 900mV
[ 6.087220] [drm] nouveau 0000:01:00.0: 3: core 810MHz shader 1620MHz memory 600MHz voltage 1040mV
[ 6.087223] [drm] nouveau 0000:01:00.0: c: core 270MHz shader 540MHz memory 405MHz voltage 900mV
[ 6.087508] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1]
[ 6.099060] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1] disconnected
[ 6.099063] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
[ 6.161414] [drm] nouveau 0000:01:00.0: nouveau_connector_native_mode:559 - native mode from preferred
[ 6.161453] [drm:drm_mode_debug_printmodeline], Modeline 54:"1600x1200" 65 175500 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
[ 6.161457] [drm:drm_mode_prune_invalid], Not using 1600x1200 mode 15
[ 6.161464] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] probed modes :
[ 6.161466] [drm:drm_mode_debug_printmodeline], Modeline 59:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 6.161469] [drm:drm_mode_debug_printmodeline], Modeline 60:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[ 6.161473] [drm:drm_mode_debug_printmodeline], Modeline 69:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[ 6.161476] [drm:drm_mode_debug_printmodeline], Modeline 68:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[ 6.161479] [drm:drm_mode_debug_printmodeline], Modeline 67:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
[ 6.161483] [drm:drm_mode_debug_printmodeline], Modeline 64:"1920x1080" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[ 6.161486] [drm:drm_mode_debug_printmodeline], Modeline 63:"1920x1080" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
[ 6.161489] [drm:drm_mode_debug_printmodeline], Modeline 33:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
[ 6.161493] [drm:drm_mode_debug_printmodeline], Modeline 32:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
[ 6.161496] [drm:drm_mode_debug_printmodeline], Modeline 58:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
[ 6.161499] [drm:drm_mode_debug_printmodeline], Modeline 53:"1400x1050" 60 101000 1400 1448 1480 1560 1050 1053 1057 1080 0x40 0x9
[ 6.161503] [drm:drm_mode_debug_printmodeline], Modeline 57:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
[ 6.161506] [drm:drm_mode_debug_printmodeline], Modeline 40:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
[ 6.161509] [drm:drm_mode_debug_printmodeline], Modeline 29:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
[ 6.161512] [drm:drm_mode_debug_printmodeline], Modeline 31:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
[ 6.161516] [drm:drm_mode_debug_printmodeline], Modeline 30:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
[ 6.161519] [drm:drm_mode_debug_printmodeline], Modeline 28:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
[ 6.161522] [drm:drm_mode_debug_printmodeline], Modeline 56:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
[ 6.161526] [drm:drm_mode_debug_printmodeline], Modeline 22:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
[ 6.161529] [drm:drm_mode_debug_printmodeline], Modeline 52:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
[ 6.161532] [drm:drm_mode_debug_printmodeline], Modeline 27:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
[ 6.161536] [drm:drm_mode_debug_printmodeline], Modeline 47:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
[ 6.161539] [drm:drm_mode_debug_printmodeline], Modeline 51:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
[ 6.161542] [drm:drm_mode_debug_printmodeline], Modeline 50:"1280x768" 60 68250 1280 1328 1360 1440 768 771 778 790 0x40 0x9
[ 6.161546] [drm:drm_mode_debug_printmodeline], Modeline 62:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
[ 6.161549] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[ 6.161552] [drm:drm_mode_debug_printmodeline], Modeline 41:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
[ 6.161555] [drm:drm_mode_debug_printmodeline], Modeline 42:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
[ 6.161559] [drm:drm_mode_debug_printmodeline], Modeline 43:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
[ 6.161562] [drm:drm_mode_debug_printmodeline], Modeline 55:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
[ 6.161565] [drm:drm_mode_debug_printmodeline], Modeline 44:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
[ 6.161569] [drm:drm_mode_debug_printmodeline], Modeline 46:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
[ 6.161572] [drm:drm_mode_debug_printmodeline], Modeline 45:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
[ 6.161575] [drm:drm_mode_debug_printmodeline], Modeline 34:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
[ 6.161579] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
[ 6.161582] [drm:drm_mode_debug_printmodeline], Modeline 66:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
[ 6.161585] [drm:drm_mode_debug_printmodeline], Modeline 49:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
[ 6.161589] [drm:drm_mode_debug_printmodeline], Modeline 65:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
[ 6.161592] [drm:drm_mode_debug_printmodeline], Modeline 36:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
[ 6.161595] [drm:drm_mode_debug_printmodeline], Modeline 35:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
[ 6.161598] [drm:drm_mode_debug_printmodeline], Modeline 37:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
[ 6.161602] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
[ 6.161605] [drm:drm_mode_debug_printmodeline], Modeline 39:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
[ 6.161609] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1]
[ 6.172104] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1] disconnected
[ 6.172107] [drm:drm_setup_crtcs],
[ 6.172114] [drm:drm_enable_connectors], connector 13 enabled? no
[ 6.172116] [drm:drm_enable_connectors], connector 16 enabled? yes
[ 6.172118] [drm:drm_enable_connectors], connector 18 enabled? no
[ 6.172120] [drm:drm_target_preferred], looking for cmdline mode on connector 16
[ 6.172122] [drm:drm_target_preferred], looking for preferred mode on connector 16
[ 6.172124] [drm:drm_target_preferred], found mode 1920x1080
[ 6.172126] [drm:drm_setup_crtcs], picking CRTCs for 8192x8192 config
[ 6.172129] [drm:drm_setup_crtcs], desired mode 1920x1080 set on crtc 11
[ 6.172151] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=8192 align=4096 flags=0x00000002
[ 6.172154] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff8801390cd340
[ 6.178571] [drm] nouveau 0000:01:00.0: allocated 1920x1080 fb: 0xe0000, bo ffff880139484800
[ 6.178643] fbcon: nouveaufb (fb0) is primary device
[ 6.191058] [drm:drm_crtc_helper_set_config],
[ 6.191060] [drm:drm_crtc_helper_set_config], [CRTC:11] [FB:23] #connectors=1 (x y) (0 0)
[ 6.191067] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
[ 6.191068] [drm:drm_crtc_helper_set_config], modes are different, full mode set
[ 6.191069] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
[ 6.191072] [drm:drm_mode_debug_printmodeline], Modeline 21:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 6.191074] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
[ 6.191076] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
[ 6.191077] [drm:drm_crtc_helper_set_config], [CONNECTOR:16:HDMI-A-1] to [CRTC:11]
[ 6.191079] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
[ 6.191080] [drm:drm_mode_debug_printmodeline], Modeline 21:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 6.191084] [drm:drm_crtc_helper_set_mode], [CRTC:11]
[ 6.191108] [drm:drm_crtc_helper_set_mode], [ENCODER:17:TMDS-17] set [MODE:21:1920x1080]
[ 6.191130] [drm:drm_detect_monitor_audio], Monitor has basic audio support
[ 6.191135] [drm:drm_edid_to_eld], ELD monitor SAMSUNG
[ 6.191137] HDMI: DVI dual 0, max TMDS clock 225, latency present 0 0, video latency 208 1, audio latency 8 64
[ 6.191138] [drm:drm_edid_to_eld], ELD size 8, SAD count 1
[ 6.191630] [drm] nouveau 0000:01:00.0: PDISP: modeset req 1
[ 6.191641] [drm] nouveau 0000:01:00.0: STAT: 0x00000000 0x00011100 0x00000000
[ 6.191647] [drm] nouveau 0000:01:00.0: DAC0: 0x00000000 0x00000000
[ 6.191655] [drm] nouveau 0000:01:00.0: DAC1: 0x00000000 0x00000000
[ 6.191662] [drm] nouveau 0000:01:00.0: DAC2: 0x00000000 0x00000000
[ 6.191668] [drm] nouveau 0000:01:00.0: DAC3: 0x00000000 0x00000000
[ 6.191675] [drm] nouveau 0000:01:00.0: SOR4: 0x00000000 0x00000000
[ 6.191683] [drm] nouveau 0000:01:00.0: SOR5: 0x00000101 0x00000101
[ 6.191689] [drm] nouveau 0000:01:00.0: SOR6: 0x00000000 0x00000000
[ 6.191695] [drm] nouveau 0000:01:00.0: SOR7: 0x00000000 0x00000000
[ 6.191718] [drm] nouveau 0000:01:00.0: Searching for output entry for 2 0 2
[ 6.191720] [drm] nouveau 0000:01:00.0: 0x5A9E: parsing output script 1
[ 6.191722] [drm] nouveau 0000:01:00.0: 0x5A9E: [ (0x71) - INIT_DONE ]
[ 6.212310] [drm] nouveau 0000:01:00.0: PDISP: modeset req 2
[ 6.212322] [drm] nouveau 0000:01:00.0: STAT: 0x00000010 0x00011100 0x00000000
[ 6.212329] [drm] nouveau 0000:01:00.0: DAC0: 0x00000000 0x00000000
[ 6.212335] [drm] nouveau 0000:01:00.0: DAC1: 0x00000000 0x00000000
[ 6.212341] [drm] nouveau 0000:01:00.0: DAC2: 0x00000000 0x00000000
[ 6.212348] [drm] nouveau 0000:01:00.0: DAC3: 0x00000000 0x00000000
[ 6.212355] [drm] nouveau 0000:01:00.0: SOR4: 0x00000000 0x00000000
[ 6.212362] [drm] nouveau 0000:01:00.0: SOR5: 0x00000101 0x00000101
[ 6.212369] [drm] nouveau 0000:01:00.0: SOR6: 0x00000000 0x00000000
[ 6.212376] [drm] nouveau 0000:01:00.0: SOR7: 0x00000000 0x00000000
[ 6.212398] [drm] nouveau 0000:01:00.0: Searching for output entry for 2 0 2
[ 6.212399] [drm] nouveau 0000:01:00.0: 0x5A9F: parsing output script 2
[ 6.212400] [drm] nouveau 0000:01:00.0: 0x5A9F: [ (0x6E) - INIT_NV_REG ]
[ 6.212402] [drm] nouveau 0000:01:00.0: 0x5A9F: Reg: 0x4061C00C, Mask: 0xFFFFFFFE, Data: 0x00000001
[ 6.212407] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C80C, Data: 0x01000000
[ 6.212408] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C80C, Data: 0x01000001
[ 6.212410] [drm] nouveau 0000:01:00.0: 0x5AAC: [ (0x6E) - INIT_NV_REG ]
[ 6.212411] [drm] nouveau 0000:01:00.0: 0x5AAC: Reg: 0x4061C014, Mask: 0xFF3FFFFF, Data: 0x00C00000
[ 6.212416] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C814, Data: 0x00020000
[ 6.212417] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C814, Data: 0x00C20000
[ 6.212420] [drm] nouveau 0000:01:00.0: 0x5AB9: [ (0x71) - INIT_DONE ]
[ 6.212430] [drm] nouveau 0000:01:00.0: nvd0_display_unk2_handler:1678 - PDISP: crtc 0 pclk 148500 mask 0x00011100
[ 6.212435] [drm] nouveau 0000:01:00.0: Loading PLL limits for register 0x00614140
[ 6.212436] [drm] nouveau 0000:01:00.0: pll.vco1.minfreq: 500000
[ 6.212437] [drm] nouveau 0000:01:00.0: pll.vco1.maxfreq: 1000000
[ 6.212438] [drm] nouveau 0000:01:00.0: pll.vco1.min_inputfreq: 25000
[ 6.212438] [drm] nouveau 0000:01:00.0: pll.vco1.max_inputfreq: 50000
[ 6.212439] [drm] nouveau 0000:01:00.0: pll.vco1.min_n: 8
[ 6.212440] [drm] nouveau 0000:01:00.0: pll.vco1.max_n: 255
[ 6.212440] [drm] nouveau 0000:01:00.0: pll.vco1.min_m: 1
[ 6.212441] [drm] nouveau 0000:01:00.0: pll.vco1.max_m: 255
[ 6.212442] [drm] nouveau 0000:01:00.0: pll.min_p: 1
[ 6.212442] [drm] nouveau 0000:01:00.0: pll.max_p: 63
[ 6.212443] [drm] nouveau 0000:01:00.0: pll.refclk: 27000
[ 6.212445] [drm] nouveau 0000:01:00.0: nv50_crtc_set_clock:373 - pclk 148500 out 148500 N 33 fN 0xf000 M 1 P 6
[ 6.212493] [drm] nouveau 0000:01:00.0: Searching for output entry for 2 0 2
[ 6.212494] [drm] nouveau 0000:01:00.0: 0x58F4: parsing clock script 0
[ 6.212495] [drm] nouveau 0000:01:00.0: 0x58F4: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
[ 6.212496] [drm] nouveau 0000:01:00.0: 0x58F4: BaseReg: 0x0061C918, Count: 0x02
[ 6.212497] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C918, Data: 0x2F2F2F2F
[ 6.212498] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C91C, Data: 0x0000002F
[ 6.212501] [drm] nouveau 0000:01:00.0: 0x5902: [ (0x7A) - INIT_ZM_REG ]
[ 6.212502] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C920, Data: 0x00000000
[ 6.212503] [drm] nouveau 0000:01:00.0: 0x590B: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.212504] [drm] nouveau 0000:01:00.0: 0x590B: Executing subroutine at 0x62FC
[ 6.212505] [drm] nouveau 0000:01:00.0: 0x62FC: [ (0x71) - INIT_DONE ]
[ 6.212506] [drm] nouveau 0000:01:00.0: 0x590B: End of 0x62FC subroutine
[ 6.212507] [drm] nouveau 0000:01:00.0: 0x590E: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.212508] [drm] nouveau 0000:01:00.0: 0x590E: Executing subroutine at 0x50A1
[ 6.212509] [drm] nouveau 0000:01:00.0: 0x50A1: [ (0x6E) - INIT_NV_REG ]
[ 6.212511] [drm] nouveau 0000:01:00.0: 0x50A1: Reg: 0x40612300, Mask: 0xFFFCFFFF, Data: 0x00030000
[ 6.212515] [drm] nouveau 0000:01:00.0: Read: Reg: 0x00612B00, Data: 0x00AB0080
[ 6.212516] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00612B00, Data: 0x00AB0080
[ 6.212518] [drm] nouveau 0000:01:00.0: 0x50AE: [ (0x71) - INIT_DONE ]
[ 6.212519] [drm] nouveau 0000:01:00.0: 0x590E: End of 0x50A1 subroutine
[ 6.212520] [drm] nouveau 0000:01:00.0: 0x5911: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.212521] [drm] nouveau 0000:01:00.0: 0x5911: Executing subroutine at 0x50E9
[ 6.212522] [drm] nouveau 0000:01:00.0: 0x50E9: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
[ 6.212523] [drm] nouveau 0000:01:00.0: 0x50E9: BaseReg: 0x4061C00C, Count: 0x04
[ 6.212525] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C80C, Data: 0x01000000
[ 6.212526] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C810, Data: 0x00300700
[ 6.212528] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C814, Data: 0x00020000
[ 6.212530] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C818, Data: 0x00245AF8
[ 6.212533] [drm] nouveau 0000:01:00.0: 0x50FF: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.212534] [drm] nouveau 0000:01:00.0: 0x50FF: Executing subroutine at 0x511D
[ 6.212535] [drm] nouveau 0000:01:00.0: 0x511D: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.212536] [drm] nouveau 0000:01:00.0: 0x511D: Executing subroutine at 0x47BE
[ 6.212537] [drm] nouveau 0000:01:00.0: 0x47BE: [ (0x6E) - INIT_NV_REG ]
[ 6.212538] [drm] nouveau 0000:01:00.0: 0x47BE: Reg: 0x4061C010, Mask: 0xFFFFE1FF, Data: 0x00001000
[ 6.212543] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00300700
[ 6.212544] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C810, Data: 0x00301100
[ 6.212546] [drm] nouveau 0000:01:00.0: 0x47CB: [ (0x74) - INIT_TIME ]
[ 6.212548] [drm] nouveau 0000:01:00.0: 0x47CB: Sleeping for 0x0064 microseconds
[ 6.212648] [drm] nouveau 0000:01:00.0: 0x47CE: [ (0x75) - INIT_CONDITION ]
[ 6.212649] [drm] nouveau 0000:01:00.0: 0x47CE: Condition: 0x08
[ 6.212650] [drm] nouveau 0000:01:00.0: 0x47CE: Cond: 0x08, Reg: 0x4061C010, Mask: 0x00008000
[ 6.212654] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00309100
[ 6.212656] [drm] nouveau 0000:01:00.0: 0x47CE: Checking if 0x00008000 equals 0x00008000
[ 6.212656] [drm] nouveau 0000:01:00.0: 0x47CE: Condition fulfilled -- continuing to execute
[ 6.212657] [drm] nouveau 0000:01:00.0: 0x47D0: [ (0x6E) - INIT_NV_REG ]
[ 6.212659] [drm] nouveau 0000:01:00.0: 0x47D0: Reg: 0x4061C010, Mask: 0xFFFFEFFF, Data: 0x00000000
[ 6.212663] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00309100
[ 6.212664] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C810, Data: 0x00308100
[ 6.212666] [drm] nouveau 0000:01:00.0: 0x47DD: [ (0x72) - INIT_RESUME ]
[ 6.212667] [drm] nouveau 0000:01:00.0: 0x47DE: [ (0x6E) - INIT_NV_REG ]
[ 6.212669] [drm] nouveau 0000:01:00.0: 0x47DE: Reg: 0x4061C010, Mask: 0xFFFFF7FF, Data: 0x00000800
[ 6.212673] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00300100
[ 6.212674] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C810, Data: 0x00300900
[ 6.212676] [drm] nouveau 0000:01:00.0: 0x47EB: [ (0x74) - INIT_TIME ]
[ 6.212677] [drm] nouveau 0000:01:00.0: 0x47EB: Sleeping for 0x0064 microseconds
[ 6.212778] [drm] nouveau 0000:01:00.0: 0x47EE: [ (0x75) - INIT_CONDITION ]
[ 6.212778] [drm] nouveau 0000:01:00.0: 0x47EE: Condition: 0x08
[ 6.212780] [drm] nouveau 0000:01:00.0: 0x47EE: Cond: 0x08, Reg: 0x4061C010, Mask: 0x00008000
[ 6.212785] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00308900
[ 6.212786] [drm] nouveau 0000:01:00.0: 0x47EE: Checking if 0x00008000 equals 0x00008000
[ 6.212787] [drm] nouveau 0000:01:00.0: 0x47EE: Condition fulfilled -- continuing to execute
[ 6.212788] [drm] nouveau 0000:01:00.0: 0x47F0: [ (0x6E) - INIT_NV_REG ]
[ 6.212789] [drm] nouveau 0000:01:00.0: 0x47F0: Reg: 0x4061C010, Mask: 0xFFFFF7FF, Data: 0x00000000
[ 6.212794] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00308900
[ 6.212795] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C810, Data: 0x00308100
[ 6.212796] [drm] nouveau 0000:01:00.0: 0x47FD: [ (0x72) - INIT_RESUME ]
[ 6.212797] [drm] nouveau 0000:01:00.0: 0x47FE: [ (0x6E) - INIT_NV_REG ]
[ 6.212798] [drm] nouveau 0000:01:00.0: 0x47FE: Reg: 0x4061C010, Mask: 0xFFFFFBFF, Data: 0x00000400
[ 6.212803] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00300100
[ 6.212804] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C810, Data: 0x00300500
[ 6.212805] [drm] nouveau 0000:01:00.0: 0x480B: [ (0x74) - INIT_TIME ]
[ 6.212806] [drm] nouveau 0000:01:00.0: 0x480B: Sleeping for 0x0064 microseconds
[ 6.212906] [drm] nouveau 0000:01:00.0: 0x480E: [ (0x75) - INIT_CONDITION ]
[ 6.212907] [drm] nouveau 0000:01:00.0: 0x480E: Condition: 0x08
[ 6.212908] [drm] nouveau 0000:01:00.0: 0x480E: Cond: 0x08, Reg: 0x4061C010, Mask: 0x00008000
[ 6.212913] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00300500
[ 6.212914] [drm] nouveau 0000:01:00.0: 0x480E: Checking if 0x00000000 equals 0x00008000
[ 6.212915] [drm] nouveau 0000:01:00.0: 0x480E: Condition not fulfilled -- skipping following commands
[ 6.212916] [drm] nouveau 0000:01:00.0: 0x4810: [ (0x6E) - INIT_NV_REG ]
[ 6.212917] [drm] nouveau 0000:01:00.0: 0x481D: [ (0x72) - INIT_RESUME ]
[ 6.212918] [drm] nouveau 0000:01:00.0: 0x481D: ---- Executing following commands ----
[ 6.212919] [drm] nouveau 0000:01:00.0: 0x481E: [ (0x6E) - INIT_NV_REG ]
[ 6.212920] [drm] nouveau 0000:01:00.0: 0x481E: Reg: 0x4061C010, Mask: 0xFFFFFDFF, Data: 0x00000200
[ 6.212925] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00300500
[ 6.212926] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C810, Data: 0x00300700
[ 6.212928] [drm] nouveau 0000:01:00.0: 0x482B: [ (0x74) - INIT_TIME ]
[ 6.212928] [drm] nouveau 0000:01:00.0: 0x482B: Sleeping for 0x0064 microseconds
[ 6.213029] [drm] nouveau 0000:01:00.0: 0x482E: [ (0x75) - INIT_CONDITION ]
[ 6.213030] [drm] nouveau 0000:01:00.0: 0x482E: Condition: 0x08
[ 6.213031] [drm] nouveau 0000:01:00.0: 0x482E: Cond: 0x08, Reg: 0x4061C010, Mask: 0x00008000
[ 6.213035] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C810, Data: 0x00300700
[ 6.213036] [drm] nouveau 0000:01:00.0: 0x482E: Checking if 0x00000000 equals 0x00008000
[ 6.213037] [drm] nouveau 0000:01:00.0: 0x482E: Condition not fulfilled -- skipping following commands
[ 6.213038] [drm] nouveau 0000:01:00.0: 0x4830: [ (0x6E) - INIT_NV_REG ]
[ 6.213039] [drm] nouveau 0000:01:00.0: 0x483D: [ (0x72) - INIT_RESUME ]
[ 6.213040] [drm] nouveau 0000:01:00.0: 0x483D: ---- Executing following commands ----
[ 6.213041] [drm] nouveau 0000:01:00.0: 0x483E: [ (0x71) - INIT_DONE ]
[ 6.213042] [drm] nouveau 0000:01:00.0: 0x511D: End of 0x47BE subroutine
[ 6.213044] [drm] nouveau 0000:01:00.0: 0x5120: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.213044] [drm] nouveau 0000:01:00.0: 0x5120: Executing subroutine at 0x506F
[ 6.213046] [drm] nouveau 0000:01:00.0: 0x506F: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.213046] [drm] nouveau 0000:01:00.0: 0x506F: Executing subroutine at 0x5ABA
[ 6.213048] [drm] nouveau 0000:01:00.0: 0x5ABA: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
[ 6.213049] [drm] nouveau 0000:01:00.0: 0x5ABA: BaseReg: 0x4061C040, Count: 0x10
[ 6.213050] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C840, Data: 0x1F0B0000
[ 6.213051] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C844, Data: 0x1F0A0000
[ 6.213054] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C848, Data: 0x1E080000
[ 6.213056] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C84C, Data: 0x1E042000
[ 6.213058] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C850, Data: 0x00008000
[ 6.213061] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C854, Data: 0x00008000
[ 6.213063] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C858, Data: 0x00008000
[ 6.213065] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C85C, Data: 0x00008000
[ 6.213068] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C860, Data: 0x00002000
[ 6.213070] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C864, Data: 0x1F002000
[ 6.213072] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C868, Data: 0x1F0C0000
[ 6.213074] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C86C, Data: 0x1F0A0000
[ 6.213075] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C870, Data: 0x1F0B8000
[ 6.213077] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C874, Data: 0x1F0B8000
[ 6.213080] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C878, Data: 0x1F0B8000
[ 6.213082] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C87C, Data: 0x1F0B8000
[ 6.213085] [drm] nouveau 0000:01:00.0: 0x5B00: [ (0x71) - INIT_DONE ]
[ 6.213086] [drm] nouveau 0000:01:00.0: 0x506F: End of 0x5ABA subroutine
[ 6.213087] [drm] nouveau 0000:01:00.0: 0x5072: [ (0x6E) - INIT_NV_REG ]
[ 6.213088] [drm] nouveau 0000:01:00.0: 0x5072: Reg: 0x4061C130, Mask: 0xFFBF00FF, Data: 0x00400600
[ 6.213092] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C930, Data: 0x00400600
[ 6.213093] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C930, Data: 0x00400600
[ 6.213095] [drm] nouveau 0000:01:00.0: 0x507F: [ (0x6E) - INIT_NV_REG ]
[ 6.213096] [drm] nouveau 0000:01:00.0: 0x507F: Reg: 0x4061C1B0, Mask: 0xFFBF00FF, Data: 0x00400600
[ 6.213101] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C9B0, Data: 0x00400600
[ 6.213102] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C9B0, Data: 0x00400600
[ 6.213103] [drm] nouveau 0000:01:00.0: 0x508C: [ (0x6E) - INIT_NV_REG ]
[ 6.213104] [drm] nouveau 0000:01:00.0: 0x508C: Reg: 0x40612300, Mask: 0xFC83FFFF, Data: 0x00280000
[ 6.213109] [drm] nouveau 0000:01:00.0: Read: Reg: 0x00612B00, Data: 0x00AB0080
[ 6.213110] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00612B00, Data: 0x00AB0080
[ 6.213112] [drm] nouveau 0000:01:00.0: 0x5099: [ (0x71) - INIT_DONE ]
[ 6.213113] [drm] nouveau 0000:01:00.0: 0x5120: End of 0x506F subroutine
[ 6.213114] [drm] nouveau 0000:01:00.0: 0x5123: [ (0x71) - INIT_DONE ]
[ 6.213115] [drm] nouveau 0000:01:00.0: 0x50FF: End of 0x511D subroutine
[ 6.213116] [drm] nouveau 0000:01:00.0: 0x5102: [ (0x71) - INIT_DONE ]
[ 6.213117] [drm] nouveau 0000:01:00.0: 0x5911: End of 0x50E9 subroutine
[ 6.213118] [drm] nouveau 0000:01:00.0: 0x5914: [ (0x71) - INIT_DONE ]
[ 6.213300] [drm] nouveau 0000:01:00.0: PDISP: modeset req 4
[ 6.213310] [drm] nouveau 0000:01:00.0: STAT: 0x00000010 0x00011100 0x00000000
[ 6.213316] [drm] nouveau 0000:01:00.0: DAC0: 0x00000000 0x00000000
[ 6.213324] [drm] nouveau 0000:01:00.0: DAC1: 0x00000000 0x00000000
[ 6.213330] [drm] nouveau 0000:01:00.0: DAC2: 0x00000000 0x00000000
[ 6.213337] [drm] nouveau 0000:01:00.0: DAC3: 0x00000000 0x00000000
[ 6.213343] [drm] nouveau 0000:01:00.0: SOR4: 0x00000000 0x00000000
[ 6.213349] [drm] nouveau 0000:01:00.0: SOR5: 0x00000101 0x00000101
[ 6.213356] [drm] nouveau 0000:01:00.0: SOR6: 0x00000000 0x00000000
[ 6.213362] [drm] nouveau 0000:01:00.0: SOR7: 0x00000000 0x00000000
[ 6.213405] [drm] nouveau 0000:01:00.0: Searching for output entry for 2 0 2
[ 6.213406] [drm] nouveau 0000:01:00.0: 0x509A: parsing clock script 1
[ 6.213407] [drm] nouveau 0000:01:00.0: 0x509A: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.213408] [drm] nouveau 0000:01:00.0: 0x509A: Executing subroutine at 0x50AF
[ 6.213409] [drm] nouveau 0000:01:00.0: 0x50AF: [ (0x56) - INIT_CONDITION_TIME ]
[ 6.213410] [drm] nouveau 0000:01:00.0: 0x50AF: Condition: 0x07, Retries: 0x64
[ 6.213412] [drm] nouveau 0000:01:00.0: 0x50AF: Cond: 0x07, Reg: 0x4061C030, Mask: 0x10000000
[ 6.213416] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C830, Data: 0x00048800
[ 6.213417] [drm] nouveau 0000:01:00.0: 0x50AF: Checking if 0x00000000 equals 0x00000000
[ 6.213417] [drm] nouveau 0000:01:00.0: 0x50AF: Condition met, continuing
[ 6.213419] [drm] nouveau 0000:01:00.0: 0x50AF: Cond: 0x07, Reg: 0x4061C030, Mask: 0x10000000
[ 6.213422] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C830, Data: 0x00048800
[ 6.213423] [drm] nouveau 0000:01:00.0: 0x50AF: Checking if 0x00000000 equals 0x00000000
[ 6.213425] [drm] nouveau 0000:01:00.0: 0x50B2: [ (0x72) - INIT_RESUME ]
[ 6.213426] [drm] nouveau 0000:01:00.0: 0x50B3: [ (0x71) - INIT_DONE ]
[ 6.213427] [drm] nouveau 0000:01:00.0: 0x509A: End of 0x50AF subroutine
[ 6.213428] [drm] nouveau 0000:01:00.0: 0x509D: [ (0x5B) - INIT_SUB_DIRECT ]
[ 6.213429] [drm] nouveau 0000:01:00.0: 0x509D: Executing subroutine at 0x50B4
[ 6.213430] [drm] nouveau 0000:01:00.0: 0x50B4: [ (0x6E) - INIT_NV_REG ]
[ 6.213431] [drm] nouveau 0000:01:00.0: 0x50B4: Reg: 0x4061C10C, Mask: 0xFFFFFFFE, Data: 0x00000000
[ 6.213435] [drm] nouveau 0000:01:00.0: Read: Reg: 0x0061C90C, Data: 0x00000000
[ 6.213436] [drm] nouveau 0000:01:00.0: Write: Reg: 0x0061C90C, Data: 0x00000000
[ 6.213438] [drm] nouveau 0000:01:00.0: 0x50C1: [ (0x6E) - INIT_NV_REG ]
[ 6.213439] [drm] nouveau 0000:01:00.0: 0x50C1: Reg: 0x80616600, Mask: 0xFFFFFFFE, Data: 0x00000000
[ 6.213443] [drm] nouveau 0000:01:00.0: Read: Reg: 0x00616600, Data: 0x00000100
[ 6.213444] [drm] nouveau 0000:01:00.0: Write: Reg: 0x00616600, Data: 0x00000100
[ 6.213445] [drm] nouveau 0000:01:00.0: 0x50CE: [ (0x71) - INIT_DONE ]
[ 6.213446] [drm] nouveau 0000:01:00.0: 0x509D: End of 0x50B4 subroutine
[ 6.213447] [drm] nouveau 0000:01:00.0: 0x50A0: [ (0x71) - INIT_DONE ]
[ 6.229947] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
[ 6.229948] [drm:drm_crtc_helper_set_config], [CONNECTOR:16:HDMI-A-1] set DPMS on
[ 6.229950] [drm:drm_crtc_helper_set_config],
[ 6.229951] [drm:drm_crtc_helper_set_config], [CRTC:12] [NOFB]
[ 6.230400] [drm:drm_crtc_helper_set_config],
[ 6.230401] [drm:drm_crtc_helper_set_config], [CRTC:11] [FB:23] #connectors=1 (x y) (0 0)
[ 6.230405] [drm:drm_crtc_helper_set_config], [CONNECTOR:16:HDMI-A-1] to [CRTC:11]
[ 6.237572] Console: switching to colour frame buffer device 240x67
[ 6.237576] [drm:drm_crtc_helper_set_config],
[ 6.237577] [drm:drm_crtc_helper_set_config], [CRTC:11] [FB:23] #connectors=1 (x y) (0 0)
[ 6.237581] [drm:drm_crtc_helper_set_config], [CONNECTOR:16:HDMI-A-1] to [CRTC:11]
[ 6.244864] fb0: nouveaufb frame buffer device
[ 6.244865] drm: registered panic notifier
[ 6.244871] [drm] Initialized nouveau 1.0.0 20120316 for 0000:01:00.0 on minor 0
[ 6.294251] hda_intel: Disabling MSI
[ 6.294265] hda-intel: 0000:01:00.1: Handle VGA-switcheroo audio client
[ 6.308143] ath: EEPROM regdomain: 0x30
[ 6.308146] ath: EEPROM indicates we should expect a direct regpair map
[ 6.308149] ath: Country alpha2 being used: AM
[ 6.308150] ath: Regpair used: 0x30
[ 6.408662] ieee80211 phy0: Selected rate control algorithm 'ath9k_rate_control'
[ 6.408932] Registered led device: ath9k-phy0
[ 6.408938] ieee80211 phy0: Atheros AR5418 MAC/BB Rev:2 AR2133 RF Rev:81 mem=0xffffc900110a0000, irq=16
[ 6.516041] usb 5-2: new full-speed USB device number 2 using uhci_hcd
[ 6.761067] usb 5-2: New USB device found, idVendor=046d, idProduct=c52b
[ 6.761073] usb 5-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
[ 6.761077] usb 5-2: Product: USB Receiver
[ 6.761080] usb 5-2: Manufacturer: Logitech
[ 6.997143] usbcore: registered new interface driver usbhid
[ 6.997146] usbhid: USB HID core driver
[ 7.380046] nvidia: module license 'NVIDIA' taints kernel.
[ 7.380050] Disabling lock debugging due to kernel taint
[ 7.396859] logitech-djreceiver 0003:046D:C52B.0003: hiddev0,hidraw0: USB HID v1.11 Device [Logitech USB Receiver] on usb-0000:00:1d.3-2/input2
[ 7.400761] input: Logitech Unifying Device. Wireless PID:400e as /devices/pci0000:00/0000:00:1d.3/usb5/5-2/5-2:1.2/0003:046D:C52B.0003/input/input3
[ 7.402872] logitech-djdevice 0003:046D:C52B.0004: input,hidraw1: USB HID v1.11 Keyboard [Logitech Unifying Device. Wireless PID:400e] on usb-0000:00:1d.3-2:1
[ 7.456745] usbcore: registered new interface driver uas
[ 7.467512] Initializing USB Mass Storage driver...
[ 7.467609] scsi10 : usb-storage 1-7:1.0
[ 7.467730] usbcore: registered new interface driver usb-storage
[ 7.467733] USB Mass Storage support registered.
[ 7.780123] input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:01.0/0000:01:00.1/sound/card0/input4
[ 7.780257] input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:01.0/0000:01:00.1/sound/card0/input5
[ 7.780887] NVRM: The NVIDIA probe routine was not called for 1 device(s).
[ 7.780891] NVRM: This can occur when a driver such as nouveau, rivafb,
[ 7.780891] NVRM: nvidiafb, or rivatv was loaded and obtained ownership of
[ 7.780891] NVRM: the NVIDIA device(s).
[ 7.780896] NVRM: Try unloading the conflicting kernel module (and/or
[ 7.780896] NVRM: reconfigure your kernel without the conflicting
[ 7.780896] NVRM: driver(s)), then try loading the NVIDIA kernel module
[ 7.780896] NVRM: again.
[ 7.780900] NVRM: No NVIDIA graphics adapter probed!
[ 8.465466] scsi 10:0:0:0: Direct-Access Generic IC1210 CF 1.9C PQ: 0 ANSI: 0 CCS
[ 8.466583] scsi 10:0:0:1: Direct-Access Generic IC1210 MS 1.9C PQ: 0 ANSI: 0 CCS
[ 8.467833] scsi 10:0:0:2: Direct-Access Generic IC1210 MMC/SD 1.9C PQ: 0 ANSI: 0 CCS
[ 8.468959] scsi 10:0:0:3: Direct-Access Generic IC1210 SM 1.9C PQ: 0 ANSI: 0 CCS
[ 8.469722] sd 10:0:0:0: Attached scsi generic sg4 type 0
[ 8.469984] sd 10:0:0:1: Attached scsi generic sg5 type 0
[ 8.470222] sd 10:0:0:2: Attached scsi generic sg6 type 0
[ 8.471276] sd 10:0:0:3: Attached scsi generic sg7 type 0
[ 8.495576] sd 10:0:0:0: [sdd] Attached SCSI removable disk
[ 8.496452] sd 10:0:0:1: [sde] Attached SCSI removable disk
[ 8.497325] sd 10:0:0:2: [sdf] Attached SCSI removable disk
[ 8.498195] sd 10:0:0:3: [sdg] Attached SCSI removable disk
[ 8.945163] md: md0 stopped.
[ 8.945919] md: bind<sdb5>
[ 8.946811] md: bind<sda5>
[ 9.022340] md: raid1 personality registered for level 1
[ 9.022511] bio: create slab <bio-1> at 1
[ 9.022587] md/raid1:md0: active with 2 out of 2 mirrors
[ 9.022609] md0: detected capacity change from 0 to 1800263237632
[ 9.041648] md0: unknown partition table
[ 9.299833] Adding 3906556k swap on /dev/sdc9. Priority:-1 extents:1 across:3906556k
[ 9.304643] EXT4-fs (sdc5): re-mounted. Opts: (null)
[ 10.500164] EXT4-fs (sdc5): re-mounted. Opts: errors=remount-ro
[ 10.677482] loop: module loaded
[ 13.898975] EXT4-fs (sdc1): mounted filesystem with ordered data mode. Opts: (null)
[ 13.967763] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null)
[ 16.098147] [drm:output_poll_execute], [CONNECTOR:13:DVI-I-1] status updated from 2 to 2
[ 16.160732] [drm:output_poll_execute], [CONNECTOR:16:HDMI-A-1] status updated from 1 to 1
[ 16.161801] [drm:output_poll_execute], [CONNECTOR:18:VGA-1] status updated from 2 to 2
[ 20.420213] EXT4-fs (sdc10): mounted filesystem with ordered data mode. Opts: (null)
[ 24.736770] EXT4-fs (md0): mounted filesystem with ordered data mode. Opts: (null)
[ 24.758991] EXT4-fs (sdc8): mounted filesystem with ordered data mode. Opts: (null)
[ 24.772128] EXT4-fs (sdc6): mounted filesystem with ordered data mode. Opts: (null)
[ 24.784399] EXT4-fs (sdc7): mounted filesystem with ordered data mode. Opts: (null)
[ 26.178178] [drm:output_poll_execute], [CONNECTOR:13:DVI-I-1] status updated from 2 to 2
[ 26.240549] [drm:output_poll_execute], [CONNECTOR:16:HDMI-A-1] status updated from 1 to 1
[ 26.241609] [drm:output_poll_execute], [CONNECTOR:18:VGA-1] status updated from 2 to 2
[ 26.363713] RPC: Registered named UNIX socket transport module.
[ 26.363717] RPC: Registered udp transport module.
[ 26.363718] RPC: Registered tcp transport module.
[ 26.363720] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 26.424079] FS-Cache: Loaded
[ 26.446968] NFS: Registering the id_resolver key type
[ 26.446980] Key type id_resolver registered
[ 26.446981] Key type id_legacy registered
[ 26.446988] FS-Cache: Netfs 'nfs' registered for caching
[ 26.462931] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
[ 27.462399] [drm:drm_crtc_helper_set_config],
[ 27.462402] [drm:drm_crtc_helper_set_config], [CRTC:11] [FB:23] #connectors=1 (x y) (0 0)
[ 27.462413] [drm:drm_crtc_helper_set_config], [CONNECTOR:16:HDMI-A-1] to [CRTC:11]
[ 28.105931] auditd (2284): /proc/2284/oom_adj is deprecated, please use /proc/2284/oom_score_adj instead.
[ 28.150705] vboxdrv: Found 2 processor cores.
[ 28.150893] vboxdrv: fAsync=0 offMin=0x318 offMax=0xba3
[ 28.150950] vboxdrv: TSC mode is 'synchronous', kernel timer mode is 'normal'.
[ 28.150952] vboxdrv: Successfully loaded version 4.1.18_Debian (interface 0x00190000).
[ 28.456701] vboxpci: IOMMU not found (not registered)
[ 30.186331] Bluetooth: Core ver 2.16
[ 30.186350] NET: Registered protocol family 31
[ 30.186352] Bluetooth: HCI device and connection manager initialized
[ 30.186354] Bluetooth: HCI socket layer initialized
[ 30.186356] Bluetooth: L2CAP socket layer initialized
[ 30.186361] Bluetooth: SCO socket layer initialized
[ 30.194469] Bluetooth: RFCOMM TTY layer initialized
[ 30.194474] Bluetooth: RFCOMM socket layer initialized
[ 30.194475] Bluetooth: RFCOMM ver 1.11
[ 30.210444] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[ 30.210447] Bluetooth: BNEP filters: protocol multicast
[ 32.722427] IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready
[ 32.730260] sky2 0000:02:00.0: eth0: enabling interface
[ 32.730937] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 35.072557] sky2 0000:02:00.0: eth0: Link is up at 1000 Mbps, full duplex, flow control rx
[ 35.072990] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 36.258167] [drm:output_poll_execute], [CONNECTOR:13:DVI-I-1] status updated from 2 to 2
[ 36.320393] [drm:output_poll_execute], [CONNECTOR:16:HDMI-A-1] status updated from 1 to 1
[ 36.321452] [drm:output_poll_execute], [CONNECTOR:18:VGA-1] status updated from 2 to 2
[ 46.338293] [drm:output_poll_execute], [CONNECTOR:13:DVI-I-1] status updated from 2 to 2
[ 46.400899] [drm:output_poll_execute], [CONNECTOR:16:HDMI-A-1] status updated from 1 to 1
[ 46.401970] [drm:output_poll_execute], [CONNECTOR:18:VGA-1] status updated from 2 to 2
[ 48.986166] [drm:drm_crtc_helper_set_config],
[ 48.986168] [drm:drm_crtc_helper_set_config], [CRTC:11] [FB:23] #connectors=1 (x y) (0 0)
[ 48.986179] [drm:drm_crtc_helper_set_config], [CONNECTOR:16:HDMI-A-1] to [CRTC:11]
[ 48.994055] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[4]
[ 48.994060] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[4]
[ 48.994109] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=262144 align=4096 flags=0x00000002
[ 48.994112] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:155 - gpuobj ffff880139c765c0
[ 48.996751] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
[ 48.996756] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1]
[ 49.008315] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1] disconnected
[ 49.008332] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
[ 49.008335] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1]
[ 49.019877] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1] disconnected
[ 49.019971] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
[ 49.019976] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
[ 49.082678] [drm] nouveau 0000:01:00.0: nouveau_connector_native_mode:559 - native mode from preferred
[ 49.082745] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x1200" 65 175500 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
[ 49.082751] [drm:drm_mode_prune_invalid], Not using 1600x1200 mode 15
[ 49.082758] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] probed modes :
[ 49.082762] [drm:drm_mode_debug_printmodeline], Modeline 59:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 49.082767] [drm:drm_mode_debug_printmodeline], Modeline 60:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[ 49.082772] [drm:drm_mode_debug_printmodeline], Modeline 69:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[ 49.082777] [drm:drm_mode_debug_printmodeline], Modeline 68:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[ 49.082782] [drm:drm_mode_debug_printmodeline], Modeline 67:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
[ 49.082787] [drm:drm_mode_debug_printmodeline], Modeline 64:"1920x1080" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[ 49.082792] [drm:drm_mode_debug_printmodeline], Modeline 63:"1920x1080" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
[ 49.082797] [drm:drm_mode_debug_printmodeline], Modeline 33:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
[ 49.082802] [drm:drm_mode_debug_printmodeline], Modeline 32:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
[ 49.082807] [drm:drm_mode_debug_printmodeline], Modeline 58:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
[ 49.082812] [drm:drm_mode_debug_printmodeline], Modeline 53:"1400x1050" 60 101000 1400 1448 1480 1560 1050 1053 1057 1080 0x40 0x9
[ 49.082817] [drm:drm_mode_debug_printmodeline], Modeline 57:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
[ 49.082822] [drm:drm_mode_debug_printmodeline], Modeline 40:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
[ 49.082827] [drm:drm_mode_debug_printmodeline], Modeline 29:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
[ 49.082832] [drm:drm_mode_debug_printmodeline], Modeline 31:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
[ 49.082837] [drm:drm_mode_debug_printmodeline], Modeline 30:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
[ 49.082842] [drm:drm_mode_debug_printmodeline], Modeline 28:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
[ 49.082847] [drm:drm_mode_debug_printmodeline], Modeline 56:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
[ 49.082852] [drm:drm_mode_debug_printmodeline], Modeline 22:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
[ 49.082857] [drm:drm_mode_debug_printmodeline], Modeline 52:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
[ 49.082862] [drm:drm_mode_debug_printmodeline], Modeline 27:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
[ 49.082867] [drm:drm_mode_debug_printmodeline], Modeline 47:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
[ 49.082872] [drm:drm_mode_debug_printmodeline], Modeline 51:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
[ 49.082876] [drm:drm_mode_debug_printmodeline], Modeline 50:"1280x768" 60 68250 1280 1328 1360 1440 768 771 778 790 0x40 0x9
[ 49.082881] [drm:drm_mode_debug_printmodeline], Modeline 62:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
[ 49.082886] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[ 49.082891] [drm:drm_mode_debug_printmodeline], Modeline 41:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
[ 49.082896] [drm:drm_mode_debug_printmodeline], Modeline 42:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
[ 49.082901] [drm:drm_mode_debug_printmodeline], Modeline 43:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
[ 49.082906] [drm:drm_mode_debug_printmodeline], Modeline 55:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
[ 49.082911] [drm:drm_mode_debug_printmodeline], Modeline 44:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
[ 49.082916] [drm:drm_mode_debug_printmodeline], Modeline 46:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
[ 49.082921] [drm:drm_mode_debug_printmodeline], Modeline 45:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
[ 49.082926] [drm:drm_mode_debug_printmodeline], Modeline 34:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
[ 49.082931] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
[ 49.082935] [drm:drm_mode_debug_printmodeline], Modeline 66:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
[ 49.082940] [drm:drm_mode_debug_printmodeline], Modeline 49:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
[ 49.082945] [drm:drm_mode_debug_printmodeline], Modeline 65:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
[ 49.082950] [drm:drm_mode_debug_printmodeline], Modeline 36:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
[ 49.082955] [drm:drm_mode_debug_printmodeline], Modeline 35:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
[ 49.082960] [drm:drm_mode_debug_printmodeline], Modeline 37:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
[ 49.082965] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
[ 49.082970] [drm:drm_mode_debug_printmodeline], Modeline 39:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
[ 49.082981] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
[ 49.083044] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
[ 49.083048] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1]
[ 49.093561] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1] disconnected
[ 49.093575] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
[ 49.093579] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1]
[ 49.104079] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1] disconnected
[ 49.104149] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
[ 49.104153] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1]
[ 49.115711] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1] disconnected
[ 49.115724] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
[ 49.115727] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1]
[ 49.127294] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:DVI-I-1] disconnected
[ 49.127354] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
[ 49.127358] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
[ 49.190034] [drm] nouveau 0000:01:00.0: nouveau_connector_native_mode:559 - native mode from preferred
[ 49.190101] [drm:drm_mode_debug_printmodeline], Modeline 99:"1600x1200" 65 175500 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
[ 49.190106] [drm:drm_mode_prune_invalid], Not using 1600x1200 mode 15
[ 49.190113] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] probed modes :
[ 49.190116] [drm:drm_mode_debug_printmodeline], Modeline 59:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 49.190121] [drm:drm_mode_debug_printmodeline], Modeline 60:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[ 49.190126] [drm:drm_mode_debug_printmodeline], Modeline 69:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[ 49.190131] [drm:drm_mode_debug_printmodeline], Modeline 68:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[ 49.190136] [drm:drm_mode_debug_printmodeline], Modeline 67:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
[ 49.190141] [drm:drm_mode_debug_printmodeline], Modeline 64:"1920x1080" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[ 49.190146] [drm:drm_mode_debug_printmodeline], Modeline 63:"1920x1080" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
[ 49.190151] [drm:drm_mode_debug_printmodeline], Modeline 33:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
[ 49.190156] [drm:drm_mode_debug_printmodeline], Modeline 32:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
[ 49.190161] [drm:drm_mode_debug_printmodeline], Modeline 58:"1680x945" 60 131481 1680 1784 1960 2240 945 946 949 978 0x0 0x6
[ 49.190166] [drm:drm_mode_debug_printmodeline], Modeline 53:"1400x1050" 60 101000 1400 1448 1480 1560 1050 1053 1057 1080 0x40 0x9
[ 49.190171] [drm:drm_mode_debug_printmodeline], Modeline 57:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
[ 49.190175] [drm:drm_mode_debug_printmodeline], Modeline 40:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
[ 49.190180] [drm:drm_mode_debug_printmodeline], Modeline 29:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
[ 49.190185] [drm:drm_mode_debug_printmodeline], Modeline 31:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
[ 49.190190] [drm:drm_mode_debug_printmodeline], Modeline 30:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
[ 49.190195] [drm:drm_mode_debug_printmodeline], Modeline 28:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
[ 49.190200] [drm:drm_mode_debug_printmodeline], Modeline 56:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
[ 49.190205] [drm:drm_mode_debug_printmodeline], Modeline 22:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
[ 49.190210] [drm:drm_mode_debug_printmodeline], Modeline 52:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
[ 49.190215] [drm:drm_mode_debug_printmodeline], Modeline 27:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
[ 49.190220] [drm:drm_mode_debug_printmodeline], Modeline 47:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
[ 49.190225] [drm:drm_mode_debug_printmodeline], Modeline 51:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
[ 49.190230] [drm:drm_mode_debug_printmodeline], Modeline 50:"1280x768" 60 68250 1280 1328 1360 1440 768 771 778 790 0x40 0x9
[ 49.190235] [drm:drm_mode_debug_printmodeline], Modeline 62:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
[ 49.190240] [drm:drm_mode_debug_printmodeline], Modeline 61:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[ 49.190245] [drm:drm_mode_debug_printmodeline], Modeline 41:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
[ 49.190250] [drm:drm_mode_debug_printmodeline], Modeline 42:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
[ 49.190254] [drm:drm_mode_debug_printmodeline], Modeline 43:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
[ 49.190259] [drm:drm_mode_debug_printmodeline], Modeline 55:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
[ 49.190264] [drm:drm_mode_debug_printmodeline], Modeline 44:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
[ 49.190269] [drm:drm_mode_debug_printmodeline], Modeline 46:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
[ 49.190274] [drm:drm_mode_debug_printmodeline], Modeline 45:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
[ 49.190279] [drm:drm_mode_debug_printmodeline], Modeline 34:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
[ 49.190284] [drm:drm_mode_debug_printmodeline], Modeline 48:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
[ 49.190288] [drm:drm_mode_debug_printmodeline], Modeline 66:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
[ 49.190293] [drm:drm_mode_debug_printmodeline], Modeline 49:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
[ 49.190298] [drm:drm_mode_debug_printmodeline], Modeline 65:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
[ 49.190303] [drm:drm_mode_debug_printmodeline], Modeline 36:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
[ 49.190308] [drm:drm_mode_debug_printmodeline], Modeline 35:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
[ 49.190313] [drm:drm_mode_debug_printmodeline], Modeline 37:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
[ 49.190318] [drm:drm_mode_debug_printmodeline], Modeline 38:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
[ 49.190322] [drm:drm_mode_debug_printmodeline], Modeline 39:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
[ 49.190334] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
[ 49.192930] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
[ 49.192935] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1]
[ 49.203433] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1] disconnected
[ 49.203448] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
[ 49.203452] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1]
[ 49.213953] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:VGA-1] disconnected
[ 49.242240] [drm] nouveau 0000:01:00.0: nouveau_gpuobj_new:150 - ch-1 size=8192 align=4096 flags=0x00000002
[ 49.242246] [drm] nouveau 0000:01:00.0:

Jonathan Nieder 10-02-2012 06:30 AM

Bug#689178: No support for modern nVidia cards (GT 610) - System unusable!
 
Kees de Jong wrote:

> I'm still forced to the Gnome fall-back mode with nouveau.noaccel=0 as
> kernel parameter. In the attachment is the dmesg output you requested
> with the other parameters. Hope it helps.

Looks like I gave the wrong parameter to set the size of the log
buffer --- the log's truncated at the beginning. No matter.

The start of a series to backport nvd9 support to the 3.2.y kernel
(for wheezy) is attached. The first 9 patches are already in wheezy
and only included here for reference. Patch 10 disables acceleration
on nvd9, both because the free firmware is not finished and because
that means fewer patches to backport to get it working. The patches
after that are a semi-random collection of patches that seemed vaguely
relevant --- I didn't finish, but I'm sending this out now so they
don't get lost.

An alternative approach would be to take drivers/gpu/drm/nouveau from
3.6 wholesale and make minimal changes to get it working on a 3.2.y
kernel. That's probably easier to keep maintained, so I might work on
that next.
From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 16 Mar 2012 12:40:17 +1000
Subject: drm/nouveau/ttm: always do buffer moves on kernel channel

commit accf94969f226ddfe7dd3a6a76ce093ace839b26 upstream.

There was once good reasons for wanting the drm to be able to use M2MF etc
on user channels, but they're not relevant anymore. For the general
buffer move case, we've already lost by transferring between vram/sysmem
already so the context switching overhead is minimal in comparison.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 11 +++--------
drivers/gpu/drm/nouveau/nouveau_drv.h | 2 --
drivers/gpu/drm/nouveau/nouveau_gem.c | 10 +---------
3 files changed, 4 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index d5af0893a9e9..671157fa4610 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -685,16 +685,12 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
struct ttm_mem_reg *new_mem)
{
struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+ struct nouveau_channel *chan = chan = dev_priv->channel;
struct nouveau_bo *nvbo = nouveau_bo(bo);
struct ttm_mem_reg *old_mem = &bo->mem;
- struct nouveau_channel *chan;
int ret;

- chan = nvbo->channel;
- if (!chan) {
- chan = dev_priv->channel;
- mutex_lock_nested(&chan->mutex, NOUVEAU_KCHANNEL_MUTEX);
- }
+ mutex_lock_nested(&chan->mutex, NOUVEAU_KCHANNEL_MUTEX);

/* create temporary vmas for the transfer and attach them to the
* old nouveau_mem node, these will get cleaned up after ttm has
@@ -726,8 +722,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
}

out:
- if (chan == dev_priv->channel)
- mutex_unlock(&chan->mutex);
+ mutex_unlock(&chan->mutex);
return ret;
}

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 4c0be3a4ed88..7b5fc0b0a02c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -113,8 +113,6 @@ struct nouveau_bo {
int pbbo_index;
bool validate_mapped;

- struct nouveau_channel *channel;
-
struct list_head vma_list;
unsigned page_shift;

diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 7ce3fde40743..ed52a6f41613 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -426,9 +426,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list,
return ret;
}

- nvbo->channel = (b->read_domains & (1 << 31)) ? NULL : chan;
ret = nouveau_bo_validate(nvbo, true, false, false);
- nvbo->channel = NULL;
if (unlikely(ret)) {
if (ret != -ERESTARTSYS)
NV_ERROR(dev, "fail ttm_validate
");
@@ -678,19 +676,13 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
return PTR_ERR(bo);
}

- /* Mark push buffers as being used on PFIFO, the validation code
- * will then make sure that if the pushbuf bo moves, that they
- * happen on the kernel channel, which will in turn cause a sync
- * to happen before we try and submit the push buffer.
- */
+ /* Ensure all push buffers are on validate list */
for (i = 0; i < req->nr_push; i++) {
if (push[i].bo_index >= req->nr_buffers) {
NV_ERROR(dev, "push %d buffer not in list
", i);
ret = -EINVAL;
goto out_prevalid;
}
-
- bo[push[i].bo_index].read_domains |= (1 << 31);
}

/* Validate buffer list */
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 16 Mar 2012 00:09:54 +1000
Subject: drm/nouveau: remove subchannel names from places where it doesn't matter

commit b5b2e5988bd18a2f6e3f192adf7439599de00d3f upstream.

These are FIFO methods, it doesn't matter what subchannel is being used.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
[jrnieder@gmail.com: backport to pre-3.3 (drm/nvd0/disp: add support
for page flipping, 2011-11-12) kernels by skipping nvd0_display.c
part]
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 23 ++++++++++++++++++-----
drivers/gpu/drm/nouveau/nouveau_fence.c | 24 ++++++++++++------------
drivers/gpu/drm/nouveau/nv50_display.c | 12 ++++++------
3 files changed, 36 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 7b5fc0b0a02c..ba7a3eab56f1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1660,13 +1660,26 @@ nv44_graph_class(struct drm_device *dev)
#define NV_MEM_TYPE_VM 0x7f
#define NV_MEM_COMP_VM 0x03

+/* FIFO methods */
+#define NV01_SUBCHAN_OBJECT 0x00000000
+#define NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH 0x00000010
+#define NV84_SUBCHAN_SEMAPHORE_ADDRESS_LOW 0x00000014
+#define NV84_SUBCHAN_SEMAPHORE_SEQUENCE 0x00000018
+#define NV84_SUBCHAN_SEMAPHORE_TRIGGER 0x0000001c
+#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL 0x00000001
+#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG 0x00000002
+#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL 0x00000004
+#define NV84_SUBCHAN_NOTIFY_INTR 0x00000020
+#define NV84_SUBCHAN_WRCACHE_FLUSH 0x00000024
+#define NV10_SUBCHAN_REF_CNT 0x00000050
+#define NV11_SUBCHAN_DMA_SEMAPHORE 0x00000060
+#define NV11_SUBCHAN_SEMAPHORE_OFFSET 0x00000064
+#define NV11_SUBCHAN_SEMAPHORE_ACQUIRE 0x00000068
+#define NV11_SUBCHAN_SEMAPHORE_RELEASE 0x0000006c
+#define NV40_SUBCHAN_YIELD 0x00000080
+
/* NV_SW object class */
#define NV_SW 0x0000506e
-#define NV_SW_DMA_SEMAPHORE 0x00000060
-#define NV_SW_SEMAPHORE_OFFSET 0x00000064
-#define NV_SW_SEMAPHORE_ACQUIRE 0x00000068
-#define NV_SW_SEMAPHORE_RELEASE 0x0000006c
-#define NV_SW_YIELD 0x00000080
#define NV_SW_DMA_VBLSEM 0x0000018c
#define NV_SW_VBLSEM_OFFSET 0x00000400
#define NV_SW_VBLSEM_RELEASE_VALUE 0x00000404
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 2f6daae68b9d..f676ecd3fd3c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -165,9 +165,9 @@ nouveau_fence_emit(struct nouveau_fence *fence)

if (USE_REFCNT(dev)) {
if (dev_priv->card_type < NV_C0)
- BEGIN_RING(chan, NvSubSw, 0x0050, 1);
+ BEGIN_RING(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
else
- BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0050, 1);
+ BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);
} else {
BEGIN_RING(chan, NvSubSw, 0x0150, 1);
}
@@ -344,7 +344,7 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
if (ret)
return ret;

- BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 3);
+ BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3);
OUT_RING (chan, NvSema);
OUT_RING (chan, offset);
OUT_RING (chan, 1);
@@ -354,9 +354,9 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
if (ret)
return ret;

- BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
+ BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
OUT_RING (chan, chan->vram_handle);
- BEGIN_RING(chan, NvSubSw, 0x0010, 4);
+ BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
OUT_RING (chan, upper_32_bits(offset));
OUT_RING (chan, lower_32_bits(offset));
OUT_RING (chan, 1);
@@ -366,7 +366,7 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
if (ret)
return ret;

- BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4);
+ BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
OUT_RING (chan, upper_32_bits(offset));
OUT_RING (chan, lower_32_bits(offset));
OUT_RING (chan, 1);
@@ -397,10 +397,10 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
if (ret)
return ret;

- BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 2);
+ BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2);
OUT_RING (chan, NvSema);
OUT_RING (chan, offset);
- BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1);
+ BEGIN_RING(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1);
OUT_RING (chan, 1);
} else
if (dev_priv->chipset < 0xc0) {
@@ -408,9 +408,9 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
if (ret)
return ret;

- BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
+ BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
OUT_RING (chan, chan->vram_handle);
- BEGIN_RING(chan, NvSubSw, 0x0010, 4);
+ BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
OUT_RING (chan, upper_32_bits(offset));
OUT_RING (chan, lower_32_bits(offset));
OUT_RING (chan, 1);
@@ -420,7 +420,7 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
if (ret)
return ret;

- BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4);
+ BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
OUT_RING (chan, upper_32_bits(offset));
OUT_RING (chan, lower_32_bits(offset));
OUT_RING (chan, 1);
@@ -510,7 +510,7 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
if (ret)
return ret;

- BEGIN_RING(chan, NvSubSw, 0, 1);
+ BEGIN_RING(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);
OUT_RING (chan, NvSw);
FIRE_RING (chan);
}
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 06de250fe617..8dd50f027bbe 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -413,15 +413,15 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
}

if (dev_priv->chipset < 0xc0) {
- BEGIN_RING(chan, NvSubSw, 0x0060, 2);
+ BEGIN_RING(chan, 0, 0x0060, 2);
OUT_RING (chan, NvEvoSema0 + nv_crtc->index);
OUT_RING (chan, dispc->sem.offset);
- BEGIN_RING(chan, NvSubSw, 0x006c, 1);
+ BEGIN_RING(chan, 0, 0x006c, 1);
OUT_RING (chan, 0xf00d0000 | dispc->sem.value);
- BEGIN_RING(chan, NvSubSw, 0x0064, 2);
+ BEGIN_RING(chan, 0, 0x0064, 2);
OUT_RING (chan, dispc->sem.offset ^ 0x10);
OUT_RING (chan, 0x74b1e000);
- BEGIN_RING(chan, NvSubSw, 0x0060, 1);
+ BEGIN_RING(chan, 0, 0x0060, 1);
if (dev_priv->chipset < 0x84)
OUT_RING (chan, NvSema);
else
@@ -429,12 +429,12 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
} else {
u64 offset = chan->dispc_vma[nv_crtc->index].offset;
offset += dispc->sem.offset;
- BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4);
+ BEGIN_NVC0(chan, 2, 0, 0x0010, 4);
OUT_RING (chan, upper_32_bits(offset));
OUT_RING (chan, lower_32_bits(offset));
OUT_RING (chan, 0xf00d0000 | dispc->sem.value);
OUT_RING (chan, 0x1002);
- BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4);
+ BEGIN_NVC0(chan, 2, 0, 0x0010, 4);
OUT_RING (chan, upper_32_bits(offset));
OUT_RING (chan, lower_32_bits(offset ^ 0x10));
OUT_RING (chan, 0x74b1e000);
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 21 Mar 2012 13:51:03 +1000
Subject: drm/nouveau: move fence sequence check to start of loop

commit b08abd4e9a11d637d3c2ff52b2ebbc1b3f686d06 upstream.

I want to be able to use REF_CNT from other places in the kernel without
pushing a fence object onto the list of emitted fences.

The current code makes an assumption that every time the acked sequence is
bumped that there's at least one fence on the list that'll be signalled.

This will no longer be true in the near future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_fence.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index f676ecd3fd3c..c1dc20f6cb85 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -93,18 +93,17 @@ nouveau_fence_update(struct nouveau_channel *chan)
}

list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
- sequence = fence->sequence;
+ if (fence->sequence > chan->fence.sequence_ack)
+ break;
+
fence->signalled = true;
list_del(&fence->entry);
-
- if (unlikely(fence->work))
+ if (fence->work)
fence->work(fence->priv, true);

kref_put(&fence->refcount, nouveau_fence_del);
-
- if (sequence == chan->fence.sequence_ack)
- break;
}
+
out:
spin_unlock(&chan->fence.lock);
}
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 21 Mar 2012 13:53:49 +1000
Subject: drm/nvc0-/disp: reimplement flip completion method as fifo method

commit d5316e251230c4e54a157349a362229c3d4daa32 upstream.

Removes need for M2MF subchannel usage on NVC0+.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_display.c | 14 +++++++----
drivers/gpu/drm/nouveau/nouveau_drv.h | 1 +
drivers/gpu/drm/nouveau/nvc0_fifo.c | 36 +++++++++++++++++++++++++----
drivers/gpu/drm/nouveau/nvc0_graph.c | 9 --------
4 files changed, 42 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 6adef062e986..e4cbdfc3ae19 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -243,15 +243,19 @@ nouveau_page_flip_emit(struct nouveau_channel *chan,
goto fail;

/* Emit the pageflip */
- ret = RING_SPACE(chan, 2);
+ ret = RING_SPACE(chan, 3);
if (ret)
goto fail;

- if (dev_priv->card_type < NV_C0)
+ if (dev_priv->card_type < NV_C0) {
BEGIN_RING(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
- else
- BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0500, 1);
- OUT_RING (chan, 0);
+ OUT_RING (chan, 0x00000000);
+ OUT_RING (chan, 0x00000000);
+ } else {
+ BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);
+ OUT_RING (chan, ++chan->fence.sequence);
+ BEGIN_NVC0(chan, 8, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
+ }
FIRE_RING (chan);

ret = nouveau_fence_new(chan, pfence, true);
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index ba7a3eab56f1..9edc3cfbcab1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1672,6 +1672,7 @@ nv44_graph_class(struct drm_device *dev)
#define NV84_SUBCHAN_NOTIFY_INTR 0x00000020
#define NV84_SUBCHAN_WRCACHE_FLUSH 0x00000024
#define NV10_SUBCHAN_REF_CNT 0x00000050
+#define NVSW_SUBCHAN_PAGE_FLIP 0x00000054
#define NV11_SUBCHAN_DMA_SEMAPHORE 0x00000060
#define NV11_SUBCHAN_SEMAPHORE_OFFSET 0x00000064
#define NV11_SUBCHAN_SEMAPHORE_ACQUIRE 0x00000068
diff --git a/drivers/gpu/drm/nouveau/nvc0_fifo.c b/drivers/gpu/drm/nouveau/nvc0_fifo.c
index dcbe0d5d0241..50d68a7a1379 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fifo.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fifo.c
@@ -436,6 +436,24 @@ nvc0_fifo_isr_vm_fault(struct drm_device *dev, int unit)
printk(" on channel 0x%010llx
", (u64)inst << 12);
}

+static int
+nvc0_fifo_page_flip(struct drm_device *dev, u32 chid)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_channel *chan = NULL;
+ unsigned long flags;
+ int ret = -EINVAL;
+
+ spin_lock_irqsave(&dev_priv->channels.lock, flags);
+ if (likely(chid >= 0 && chid < dev_priv->engine.fifo.channels)) {
+ chan = dev_priv->channels.ptr[chid];
+ if (likely(chan))
+ ret = nouveau_finish_page_flip(chan, NULL);
+ }
+ spin_unlock_irqrestore(&dev_priv->channels.lock, flags);
+ return ret;
+}
+
static void
nvc0_fifo_isr_subfifo_intr(struct drm_device *dev, int unit)
{
@@ -445,11 +463,21 @@ nvc0_fifo_isr_subfifo_intr(struct drm_device *dev, int unit)
u32 chid = nv_rd32(dev, 0x040120 + (unit * 0x2000)) & 0x7f;
u32 subc = (addr & 0x00070000);
u32 mthd = (addr & 0x00003ffc);
+ u32 show = stat;

- NV_INFO(dev, "PSUBFIFO %d:", unit);
- nouveau_bitfield_print(nvc0_fifo_subfifo_intr, stat);
- NV_INFO(dev, "PSUBFIFO %d: ch %d subc %d mthd 0x%04x data 0x%08x
",
- unit, chid, subc, mthd, data);
+ if (stat & 0x00200000) {
+ if (mthd == 0x0054) {
+ if (!nvc0_fifo_page_flip(dev, chid))
+ show &= ~0x00200000;
+ }
+ }
+
+ if (show) {
+ NV_INFO(dev, "PFIFO%d:", unit);
+ nouveau_bitfield_print(nvc0_fifo_subfifo_intr, show);
+ NV_INFO(dev, "PFIFO%d: ch %d subc %d mthd 0x%04x data 0x%08x
",
+ unit, chid, subc, mthd, data);
+ }

nv_wr32(dev, 0x0400c0 + (unit * 0x2000), 0x80600008);
nv_wr32(dev, 0x040108 + (unit * 0x2000), stat);
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c
index ecfafd70cf0e..cb596e9330a9 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -333,14 +333,6 @@ nvc0_graph_fini(struct drm_device *dev, int engine, bool suspend)
return 0;
}

-static int
-nvc0_graph_mthd_page_flip(struct nouveau_channel *chan,
- u32 class, u32 mthd, u32 data)
-{
- nouveau_finish_page_flip(chan, NULL);
- return 0;
-}
-
static void
nvc0_graph_init_obj418880(struct drm_device *dev)
{
@@ -887,7 +879,6 @@ nvc0_graph_create(struct drm_device *dev)

NVOBJ_CLASS(dev, 0x902d, GR); /* 2D */
NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */
- NVOBJ_MTHD (dev, 0x9039, 0x0500, nvc0_graph_mthd_page_flip);
NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */
if (fermi >= 0x9197)
NVOBJ_CLASS(dev, 0x9197, GR); /* 3D (NVC1-) */
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Sun, 18 Mar 2012 00:40:41 +1000
Subject: drm/nouveau: remove m2mf creation on userspace channels

commit 48aca13f0167ae78c28c6b48d82a157a6692eecb upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_channel.c | 19 ++++--
drivers/gpu/drm/nouveau/nouveau_dma.c | 61 +------------------
drivers/gpu/drm/nouveau/nouveau_drv.h | 3 +-
drivers/gpu/drm/nouveau/nouveau_state.c | 91 ++++++++++++++++++++++++-----
4 files changed, 93 insertions(+), 81 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index bb6ec9ef8676..b78d20e9dce0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -122,7 +122,7 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv);
struct nouveau_channel *chan;
unsigned long flags;
- int ret;
+ int ret, i;

/* allocate and lock channel structure */
chan = kzalloc(sizeof(*chan), GFP_KERNEL);
@@ -184,7 +184,7 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
return ret;
}

- nouveau_dma_pre_init(chan);
+ nouveau_dma_init(chan);
chan->user_put = 0x40;
chan->user_get = 0x44;

@@ -200,9 +200,18 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,

pfifo->reassign(dev, true);

- ret = nouveau_dma_init(chan);
- if (!ret)
- ret = nouveau_fence_channel_init(chan);
+ /* Insert NOPs for NOUVEAU_DMA_SKIPS */
+ ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
+ if (ret) {
+ nouveau_channel_put(&chan);
+ return ret;
+ }
+
+ for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
+ OUT_RING (chan, 0x00000000);
+ FIRE_RING(chan);
+
+ ret = nouveau_fence_channel_init(chan);
if (ret) {
nouveau_channel_put(&chan);
return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index 00bc6eaad558..b911273c3c3d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -31,7 +31,7 @@
#include "nouveau_ramht.h"

void
-nouveau_dma_pre_init(struct nouveau_channel *chan)
+nouveau_dma_init(struct nouveau_channel *chan)
{
struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
struct nouveau_bo *pushbuf = chan->pushbuf_bo;
@@ -54,65 +54,6 @@ nouveau_dma_pre_init(struct nouveau_channel *chan)
chan->dma.free = chan->dma.max - chan->dma.cur;
}

-int
-nouveau_dma_init(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret, i;
-
- if (dev_priv->card_type >= NV_C0) {
- ret = nouveau_gpuobj_gr_new(chan, 0x9039, 0x9039);
- if (ret)
- return ret;
-
- ret = RING_SPACE(chan, 2);
- if (ret)
- return ret;
-
- BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0000, 1);
- OUT_RING (chan, 0x00009039);
- FIRE_RING (chan);
- return 0;
- }
-
- /* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */
- ret = nouveau_gpuobj_gr_new(chan, NvM2MF, dev_priv->card_type < NV_50 ?
- 0x0039 : 0x5039);
- if (ret)
- return ret;
-
- /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */
- ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfe0, 0x1000,
- &chan->m2mf_ntfy);
- if (ret)
- return ret;
-
- /* Insert NOPS for NOUVEAU_DMA_SKIPS */
- ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
- if (ret)
- return ret;
-
- for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
- OUT_RING(chan, 0);
-
- /* Initialise NV_MEMORY_TO_MEMORY_FORMAT */
- ret = RING_SPACE(chan, 6);
- if (ret)
- return ret;
- BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NAME, 1);
- OUT_RING (chan, NvM2MF);
- BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);
- OUT_RING (chan, NvNotify0);
- OUT_RING (chan, chan->vram_handle);
- OUT_RING (chan, chan->gart_handle);
-
- /* Sit back and pray the channel works.. */
- FIRE_RING(chan);
-
- return 0;
-}
-
void
OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords)
{
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 9edc3cfbcab1..f1dd6b55f357 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1030,8 +1030,7 @@ nouveau_debugfs_channel_fini(struct nouveau_channel *chan)
#endif

/* nouveau_dma.c */
-extern void nouveau_dma_pre_init(struct nouveau_channel *);
-extern int nouveau_dma_init(struct nouveau_channel *);
+extern void nouveau_dma_init(struct nouveau_channel *);
extern int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);

/* nouveau_acpi.c */
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index d8831ab42bb9..57623378593c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -547,6 +547,75 @@ static bool nouveau_switcheroo_can_switch(struct pci_dev *pdev)
return can_switch;
}

+static void
+nouveau_card_channel_fini(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+ if (dev_priv->channel)
+ nouveau_channel_put_unlocked(&dev_priv->channel);
+}
+
+static int
+nouveau_card_channel_init(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_channel *chan;
+ int ret, oclass;
+
+ ret = nouveau_channel_alloc(dev, &chan, NULL, NvDmaFB, NvDmaTT);
+ dev_priv->channel = chan;
+ if (ret)
+ return ret;
+
+ mutex_unlock(&dev_priv->channel->mutex);
+
+ if (dev_priv->card_type <= NV_50) {
+ if (dev_priv->card_type < NV_50)
+ oclass = 0x0039;
+ else
+ oclass = 0x5039;
+
+ ret = nouveau_gpuobj_gr_new(chan, NvM2MF, oclass);
+ if (ret)
+ goto error;
+
+ ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfe0, 0x1000,
+ &chan->m2mf_ntfy);
+ if (ret)
+ goto error;
+
+ ret = RING_SPACE(chan, 6);
+ if (ret)
+ goto error;
+
+ BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NAME, 1);
+ OUT_RING (chan, NvM2MF);
+ BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);
+ OUT_RING (chan, NvNotify0);
+ OUT_RING (chan, chan->vram_handle);
+ OUT_RING (chan, chan->gart_handle);
+ } else
+ if (dev_priv->card_type <= NV_C0) {
+ ret = nouveau_gpuobj_gr_new(chan, 0x9039, 0x9039);
+ if (ret)
+ goto error;
+
+ ret = RING_SPACE(chan, 2);
+ if (ret)
+ goto error;
+
+ BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0000, 1);
+ OUT_RING (chan, 0x00009039);
+ }
+
+ FIRE_RING (chan);
+error:
+ if (ret)
+ nouveau_card_channel_fini(dev);
+ return ret;
+}
+
int
nouveau_card_init(struct drm_device *dev)
{
@@ -738,17 +807,14 @@ nouveau_card_init(struct drm_device *dev)

nouveau_backlight_init(dev);

- if (dev_priv->eng[NVOBJ_ENGINE_GR]) {
- ret = nouveau_fence_init(dev);
- if (ret)
- goto out_disp;
+ ret = nouveau_fence_init(dev);
+ if (ret)
+ goto out_disp;

- ret = nouveau_channel_alloc(dev, &dev_priv->channel, NULL,
- NvDmaFB, NvDmaTT);
+ if (!dev_priv->noaccel) {
+ ret = nouveau_card_channel_init(dev);
if (ret)
goto out_fence;
-
- mutex_unlock(&dev_priv->channel->mutex);
}

if (dev->mode_config.num_crtc) {
@@ -763,7 +829,7 @@ nouveau_card_init(struct drm_device *dev)
return 0;

out_chan:
- nouveau_channel_put_unlocked(&dev_priv->channel);
+ nouveau_card_channel_fini(dev);
out_fence:
nouveau_fence_fini(dev);
out_disp:
@@ -823,11 +889,8 @@ static void nouveau_card_takedown(struct drm_device *dev)
drm_vblank_cleanup(dev);
}

- if (dev_priv->channel) {
- nouveau_channel_put_unlocked(&dev_priv->channel);
- nouveau_fence_fini(dev);
- }
-
+ nouveau_card_channel_fini(dev);
+ nouveau_fence_fini(dev);
nouveau_backlight_exit(dev);
engine->display.destroy(dev);
drm_mode_config_cleanup(dev);
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Thu, 29 Mar 2012 20:24:34 +1000
Subject: drm/nouveau: inform userspace of relaxed kernel subchannel requirements

commit 02bfc2881e0d5b23147211bb6420798d946a7b5c upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_channel.c | 11 ++---------
1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index b78d20e9dce0..930db08a9b81 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -434,18 +434,11 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
}

if (dev_priv->card_type < NV_C0) {
- init->subchan[0].handle = NvM2MF;
- if (dev_priv->card_type < NV_50)
- init->subchan[0].grclass = 0x0039;
- else
- init->subchan[0].grclass = 0x5039;
+ init->subchan[0].handle = 0x00000000;
+ init->subchan[0].grclass = 0x0000;
init->subchan[1].handle = NvSw;
init->subchan[1].grclass = NV_SW;
init->nr_subchan = 2;
- } else {
- init->subchan[0].handle = 0x9039;
- init->subchan[0].grclass = 0x9039;
- init->nr_subchan = 1;
}

/* Named memory object area */
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 16 Mar 2012 13:45:09 +1000
Subject: drm/nouveau: oops, increase channel dispc_vma to 4

commit 27100ac95a8eee0b083e46bfa67b229ac641d28c upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index f1dd6b55f357..0aa55d057ece 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -290,7 +290,7 @@ struct nouveau_channel {

uint32_t sw_subchannel[8];

- struct nouveau_vma dispc_vma[2];
+ struct nouveau_vma dispc_vma[4];
struct {
struct nouveau_gpuobj *vblsem;
uint32_t vblsem_head;
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 16 Mar 2012 15:32:16 +1000
Subject: drm/nvd0/disp: ignore clock set if no pclk

commit dd62608bcc8a629c4c583fb50b90003fd5213516 upstream.

This happens somehow during init on a machine I have, and leads to a
divide-by-zero.

Lets avoid that...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nvd0_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index 3002d8283a1a..cfa95d700269 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -1048,7 +1048,9 @@ nvd0_display_unk2_handler(struct drm_device *dev, u32 crtc, u32 mask)
}

pclk = nv_rd32(dev, 0x660450 + (crtc * 0x300)) / 1000;
- if (mask & 0x00010000) {
+ NV_DEBUG_KMS(dev, "PDISP: crtc %d pclk %d mask 0x%08x
",
+ crtc, pclk, mask);
+ if (pclk && (mask & 0x00010000)) {
nv50_crtc_set_clock(dev, crtc, pclk);
}

--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 16 Mar 2012 12:44:34 +1000
Subject: drm/nouveau: bump version to 1.0.0

commit f887c425f9eeed8ffbca64c8be45da62b07096c0 upstream.

The time has come to get a proper version number that we can change to
indicate new features etc, rather than the lock-step 0.0.XX that we
previously had.

libdrm has recognised this version as compatible with 0.0.16 since 2.4.22,
so hopefully any breakage people see should be very minimal.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 0aa55d057ece..0a9e5fe9f251 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -26,15 +26,15 @@
#define __NOUVEAU_DRV_H__

#define DRIVER_AUTHOR "Stephane Marchesin"
-#define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
+#define DRIVER_EMAIL "nouveau@lists.freedesktop.org"

#define DRIVER_NAME "nouveau"
#define DRIVER_DESC "nVidia Riva/TNT/GeForce"
-#define DRIVER_DATE "20090420"
+#define DRIVER_DATE "20120316"

-#define DRIVER_MAJOR 0
+#define DRIVER_MAJOR 1
#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 16
+#define DRIVER_PATCHLEVEL 0

#define NOUVEAU_FAMILY 0x0000FFFF
#define NOUVEAU_FLAGS 0xFFFF0000
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Mon, 11 Jul 2011 15:57:54 +1000
Subject: drm/nvc0: disable accelaration for nvd9 cards

Extracted from upstream commit 06784090ecb3f925616fc797164a74b03d5c0968
which adds partial nvd9 support.

Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_state.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 57623378593c..387e13baf1e0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -1173,13 +1173,11 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
dev_priv->noaccel = !!nouveau_noaccel;
if (nouveau_noaccel == -1) {
switch (dev_priv->chipset) {
-#if 0
- case 0xXX: /* known broken */
+ case 0xd9: /* known broken */
NV_INFO(dev, "acceleration disabled by default, pass "
"noaccel=0 to force enable
");
dev_priv->noaccel = true;
break;
-#endif
default:
dev_priv->noaccel = false;
break;
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Mon, 6 Feb 2012 11:42:29 +1000
Subject: drm/nvd9/pm: oops, fix timing calc

commit a94ba1fcac417d0b72f73fb77e730279ca9203c3 upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
[jrnieder@gmail.com: backport to pre-3.4 (drm/nouveau/pm: calculate
memory timings at perflvl creation time, 2012-01-17) kernels]
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_mem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 36bec4807701..8dbe516df0e5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -693,7 +693,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
nv40_mem_timing_entry(dev,hdr,(struct nouveau_pm_tbl_entry*) entry,magic_number,&pm->memtimings.timing[i]);
} else if(dev_priv->card_type == NV_50){
nv50_mem_timing_entry(dev,&P,hdr,(struct nouveau_pm_tbl_entry*) entry,magic_number,&pm->memtimings.timing[i]);
- } else if(dev_priv->card_type == NV_C0) {
+ } else if(dev_priv->card_type == NV_C0 || dev_priv->card_type == NV_D0) {
nvc0_mem_timing_entry(dev,hdr,(struct nouveau_pm_tbl_entry*) entry,&pm->memtimings.timing[i]);
}
}
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 11 Nov 2011 20:26:44 +1000
Subject: drm/nvd0/disp: hook evo up to debugging

commit 27517ddbdcc59ab43ed18d7bbe53680d428bbd20 upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nvd0_display.c | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index cfa95d700269..720920796ccb 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -84,6 +84,9 @@ evo_wait(struct drm_device *dev, int id, int nr)
put = 0;
}

+ if (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
+ NV_INFO(dev, "Evo%d: %p START
", id, disp->evo[id].ptr + put);
+
return disp->evo[id].ptr + put;
}

@@ -91,6 +94,16 @@ static void
evo_kick(u32 *push, struct drm_device *dev, int id)
{
struct nvd0_display *disp = nvd0_display(dev);
+
+ if (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO) {
+ u32 curp = nv_rd32(dev, 0x640000 + (id * 0x1000)) >> 2;
+ u32 *cur = disp->evo[id].ptr + curp;
+
+ while (cur < push)
+ NV_INFO(dev, "Evo%d: 0x%08x
", id, *cur++);
+ NV_INFO(dev, "Evo%d: %p KICK!
", id, push);
+ }
+
nv_wr32(dev, 0x640000 + (id * 0x1000), (push - disp->evo[id].ptr) << 2);
}

--
1.7.10.4

From: Martin Peres <martin.peres@ensi-bourges.fr>
Date: Sat, 22 Oct 2011 01:40:40 +0200
Subject: drm/nvd0: read temperature as we did on nv84+ boards

commit 6109183794a711d80c08705d477d2a19b437d5c1 upstream.

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_state.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 387e13baf1e0..9faf952ca68f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -471,6 +471,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->vram.get = nvc0_vram_new;
engine->vram.put = nv50_vram_del;
engine->vram.flags_valid = nvc0_vram_flags_valid;
+ engine->pm.temp_get = nv84_temp_get;
engine->pm.clocks_get = nvc0_pm_clocks_get;
engine->pm.voltage_get = nouveau_voltage_gpio_get;
engine->pm.voltage_set = nouveau_voltage_gpio_set;
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 5 Oct 2011 11:05:07 +1000
Subject: drm/nouveau/hdmi: build ELD from EDID, notify audio driver of its presence

commit 25575b414c2137a16b313bdfdeab570b70080f37 upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/Makefile | 2 +-
drivers/gpu/drm/nouveau/nouveau_drv.h | 3 +
drivers/gpu/drm/nouveau/nouveau_hdmi.c | 103 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/nouveau/nv50_sor.c | 4 ++
4 files changed, 111 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/nouveau/nouveau_hdmi.c

diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index 35ef5b1e3566..1f79ac52c8d1 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -9,7 +9,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o
nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o
nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o
nouveau_display.o nouveau_connector.o nouveau_fbcon.o
- nouveau_dp.o nouveau_ramht.o
+ nouveau_hdmi.o nouveau_dp.o nouveau_ramht.o
nouveau_pm.o nouveau_volt.o nouveau_perf.o nouveau_temp.o
nouveau_mm.o nouveau_vm.o
nv04_timer.o
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 0a9e5fe9f251..0026976eee67 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1093,6 +1093,9 @@ int nouveau_ttm_global_init(struct drm_nouveau_private *);
void nouveau_ttm_global_release(struct drm_nouveau_private *);
int nouveau_ttm_mmap(struct file *, struct vm_area_struct *);

+/* nouveau_hdmi.c */
+void nouveau_hdmi_mode_set(struct drm_encoder *, struct drm_display_mode *);
+
/* nouveau_dp.c */
int nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
uint8_t *data, int data_nr);
diff --git a/drivers/gpu/drm/nouveau/nouveau_hdmi.c b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
new file mode 100644
index 000000000000..489a2418a227
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright 2011 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_connector.h"
+#include "nouveau_encoder.h"
+
+static bool
+hdmi_sor(struct drm_encoder *encoder)
+{
+ struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
+ if (dev_priv->chipset < 0xa3)
+ return false;
+ return true;
+}
+
+static void
+nouveau_audio_disconnect(struct drm_encoder *encoder)
+{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct drm_device *dev = encoder->dev;
+ int or = nv_encoder->or * 0x800;
+
+ if (hdmi_sor(encoder)) {
+ nv_mask(dev, 0x61c448 + or, 0x00000003, 0x00000000);
+ }
+}
+
+static void
+nouveau_audio_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode)
+{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct nouveau_connector *nv_connector;
+ struct drm_device *dev = encoder->dev;
+ u32 or = nv_encoder->or * 0x800;
+ int i;
+
+ nv_connector = nouveau_encoder_connector_get(nv_encoder);
+ if (!drm_detect_monitor_audio(nv_connector->edid)) {
+ nouveau_audio_disconnect(encoder);
+ return;
+ }
+
+ if (hdmi_sor(encoder)) {
+ nv_mask(dev, 0x61c448 + or, 0x00000001, 0x00000001);
+
+ drm_edid_to_eld(&nv_connector->base, nv_connector->edid);
+ if (nv_connector->base.eld[0]) {
+ u8 *eld = nv_connector->base.eld;
+ for (i = 0; i < eld[2] * 4; i++)
+ nv_wr32(dev, 0x61c440 + or, (i << 8) | eld[i]);
+ for (i = eld[2] * 4; i < 0x60; i++)
+ nv_wr32(dev, 0x61c440 + or, (i << 8) | 0x00);
+ nv_mask(dev, 0x61c448 + or, 0x00000002, 0x00000002);
+ }
+ }
+}
+
+static void
+nouveau_hdmi_disconnect(struct drm_encoder *encoder)
+{
+ nouveau_audio_disconnect(encoder);
+}
+
+void
+nouveau_hdmi_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode)
+{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct nouveau_connector *nv_connector;
+
+ nv_connector = nouveau_encoder_connector_get(nv_encoder);
+ if (!mode || !nv_connector || !nv_connector->edid ||
+ !drm_detect_hdmi_monitor(nv_connector->edid)) {
+ nouveau_hdmi_disconnect(encoder);
+ return;
+ }
+
+ nouveau_audio_mode_set(encoder, mode);
+}
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
index 2633aa8554eb..2a638aeb5061 100644
--- a/drivers/gpu/drm/nouveau/nv50_sor.c
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -60,6 +60,8 @@ nv50_sor_disconnect(struct drm_encoder *encoder)
BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
OUT_RING (evo, 0);

+ nouveau_hdmi_mode_set(encoder, NULL);
+
nv_encoder->crtc = NULL;
nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
}
@@ -203,6 +205,8 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
mode_ctl = 0x0500;
} else
mode_ctl = 0x0200;
+
+ nouveau_hdmi_mode_set(encoder, mode);
break;
case OUTPUT_DP:
nv_connector = nouveau_encoder_connector_get(nv_encoder);
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 5 Oct 2011 14:52:02 +1000
Subject: drm/nouveau/hdmi: add hdmi register accessors to handle hdmi block move

commit 52c7bcdb6749a3920739640ca791e1f741f139d0 upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_hdmi.c | 33 +++++++++++++++++++++++++++++++-
drivers/gpu/drm/nouveau/nv50_sor.c | 6 +++---
2 files changed, 35 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_hdmi.c b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
index 489a2418a227..d8540a64a8d3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hdmi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
@@ -26,6 +26,7 @@
#include "nouveau_drv.h"
#include "nouveau_connector.h"
#include "nouveau_encoder.h"
+#include "nouveau_crtc.h"

static bool
hdmi_sor(struct drm_encoder *encoder)
@@ -36,12 +37,42 @@ hdmi_sor(struct drm_encoder *encoder)
return true;
}

+static inline u32
+hdmi_base(struct drm_encoder *encoder)
+{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
+ if (!hdmi_sor(encoder))
+ return 0x616500 + (nv_crtc->index * 0x800);
+ return 0x61c500 + (nv_encoder->or * 0x800);
+}
+
+static void
+hdmi_wr32(struct drm_encoder *encoder, u32 reg, u32 val)
+{
+ nv_wr32(encoder->dev, hdmi_base(encoder) + reg, val);
+}
+
+static u32
+hdmi_rd32(struct drm_encoder *encoder, u32 reg)
+{
+ return nv_rd32(encoder->dev, hdmi_base(encoder) + reg);
+}
+
+static u32
+hdmi_mask(struct drm_encoder *encoder, u32 reg, u32 mask, u32 val)
+{
+ u32 tmp = hdmi_rd32(encoder, reg);
+ hdmi_wr32(encoder, reg, (tmp & ~mask) | val);
+ return tmp;
+}
+
static void
nouveau_audio_disconnect(struct drm_encoder *encoder)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct drm_device *dev = encoder->dev;
- int or = nv_encoder->or * 0x800;
+ u32 or = nv_encoder->or * 0x800;

if (hdmi_sor(encoder)) {
nv_mask(dev, 0x61c448 + or, 0x00000003, 0x00000000);
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
index 2a638aeb5061..da603b1d8e3f 100644
--- a/drivers/gpu/drm/nouveau/nv50_sor.c
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -195,6 +195,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,

NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d
",
nv_encoder->or, nv_encoder->dcb->type, crtc->index);
+ nv_encoder->crtc = encoder->crtc;

switch (nv_encoder->dcb->type) {
case OUTPUT_TMDS:
@@ -206,7 +207,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
} else
mode_ctl = 0x0200;

- nouveau_hdmi_mode_set(encoder, mode);
+ nouveau_hdmi_mode_set(encoder, adjusted_mode);
break;
case OUTPUT_DP:
nv_connector = nouveau_encoder_connector_get(nv_encoder);
@@ -243,12 +244,11 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
ret = RING_SPACE(evo, 2);
if (ret) {
NV_ERROR(dev, "no space while connecting SOR
");
+ nv_encoder->crtc = NULL;
return;
}
BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
OUT_RING(evo, mode_ctl);
-
- nv_encoder->crtc = encoder->crtc;
}

static struct drm_crtc *
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 5 Oct 2011 14:59:14 +1000
Subject: drm/nouveau/hdmi: enable sending of avi/audio infoframes

commit b2337f2333c0bdefc9b230da17ed7188e4eb7f6c upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_hdmi.c | 103 ++++++++++++++++++++++++++++++++
1 file changed, 103 insertions(+)

diff --git a/drivers/gpu/drm/nouveau/nouveau_hdmi.c b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
index d8540a64a8d3..3b4120f0626a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hdmi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
@@ -111,9 +111,106 @@ nouveau_audio_mode_set(struct drm_encoder *encoder,
}

static void
+nouveau_hdmi_infoframe(struct drm_encoder *encoder, u32 ctrl, u8 *frame)
+{
+ /* calculate checksum for the infoframe */
+ u8 sum = 0, i;
+ for (i = 0; i < frame[2]; i++)
+ sum += frame[i];
+ frame[3] = 256 - sum;
+
+ /* disable infoframe, and write header */
+ hdmi_mask(encoder, ctrl + 0x00, 0x00000001, 0x00000000);
+ hdmi_wr32(encoder, ctrl + 0x08, *(u32 *)frame & 0xffffff);
+
+ /* register scans tell me the audio infoframe has only one set of
+ * subpack regs, according to tegra (gee nvidia, it'd be nice if we
+ * could get those docs too!), the hdmi block pads out the rest of
+ * the packet on its own.
+ */
+ if (ctrl == 0x020)
+ frame[2] = 6;
+
+ /* write out checksum and data, weird weird 7 byte register pairs */
+ for (i = 0; i < frame[2] + 1; i += 7) {
+ u32 rsubpack = ctrl + 0x0c + ((i / 7) * 8);
+ u32 *subpack = (u32 *)&frame[3 + i];
+ hdmi_wr32(encoder, rsubpack + 0, subpack[0]);
+ hdmi_wr32(encoder, rsubpack + 4, subpack[1] & 0xffffff);
+ }
+
+ /* enable the infoframe */
+ hdmi_mask(encoder, ctrl, 0x00000001, 0x00000001);
+}
+
+static void
+nouveau_hdmi_video_infoframe(struct drm_encoder *encoder,
+ struct drm_display_mode *mode)
+{
+ const u8 Y = 0, A = 0, B = 0, S = 0, C = 0, M = 0, R = 0;
+ const u8 ITC = 0, EC = 0, Q = 0, SC = 0, VIC = 0, PR = 0;
+ const u8 bar_top = 0, bar_bottom = 0, bar_left = 0, bar_right = 0;
+ u8 frame[20];
+
+ frame[0x00] = 0x82; /* AVI infoframe */
+ frame[0x01] = 0x02; /* version */
+ frame[0x02] = 0x0d; /* length */
+ frame[0x03] = 0x00;
+ frame[0x04] = (Y << 5) | (A << 4) | (B << 2) | S;
+ frame[0x05] = (C << 6) | (M << 4) | R;
+ frame[0x06] = (ITC << 7) | (EC << 4) | (Q << 2) | SC;
+ frame[0x07] = VIC;
+ frame[0x08] = PR;
+ frame[0x09] = bar_top & 0xff;
+ frame[0x0a] = bar_top >> 8;
+ frame[0x0b] = bar_bottom & 0xff;
+ frame[0x0c] = bar_bottom >> 8;
+ frame[0x0d] = bar_left & 0xff;
+ frame[0x0e] = bar_left >> 8;
+ frame[0x0f] = bar_right & 0xff;
+ frame[0x10] = bar_right >> 8;
+ frame[0x11] = 0x00;
+ frame[0x12] = 0x00;
+ frame[0x13] = 0x00;
+
+ nouveau_hdmi_infoframe(encoder, 0x020, frame);
+}
+
+static void
+nouveau_hdmi_audio_infoframe(struct drm_encoder *encoder,
+ struct drm_display_mode *mode)
+{
+ const u8 CT = 0x00, CC = 0x01, ceaSS = 0x00, SF = 0x00, FMT = 0x00;
+ const u8 CA = 0x00, DM_INH = 0, LSV = 0x00;
+ u8 frame[12];
+
+ frame[0x00] = 0x84; /* Audio infoframe */
+ frame[0x01] = 0x01; /* version */
+ frame[0x02] = 0x0a; /* length */
+ frame[0x03] = 0x00;
+ frame[0x04] = (CT << 4) | CC;
+ frame[0x05] = (SF << 2) | ceaSS;
+ frame[0x06] = FMT;
+ frame[0x07] = CA;
+ frame[0x08] = (DM_INH << 7) | (LSV << 3);
+ frame[0x09] = 0x00;
+ frame[0x0a] = 0x00;
+ frame[0x0b] = 0x00;
+
+ nouveau_hdmi_infoframe(encoder, 0x000, frame);
+}
+
+static void
nouveau_hdmi_disconnect(struct drm_encoder *encoder)
{
nouveau_audio_disconnect(encoder);
+
+ /* disable audio and avi infoframes */
+ hdmi_mask(encoder, 0x000, 0x00000001, 0x00000000);
+ hdmi_mask(encoder, 0x020, 0x00000001, 0x00000000);
+
+ /* disable hdmi */
+ hdmi_mask(encoder, 0x0a4, 0x40000000, 0x00000000);
}

void
@@ -130,5 +227,11 @@ nouveau_hdmi_mode_set(struct drm_encoder *encoder,
return;
}

+ /* enable hdmi */
+ hdmi_mask(encoder, 0x0a4, 0x40000000, 0x40000000);
+
+ nouveau_hdmi_video_infoframe(encoder, mode);
+ nouveau_hdmi_audio_infoframe(encoder, mode);
+
nouveau_audio_mode_set(encoder, mode);
}
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 9 Nov 2011 10:03:01 +1000
Subject: drm/nouveau/hdmi: enable audio for nva3:nvd0 chipsets

commit 50a01fe06e25b271661c6691bc0907ad5ca2c718 upstream.

Pre-nva3 will likely require far more extensive setup, and nvd9 needs to
be checked to find its SOR_HDMI/SOR_AUDIO blocks.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_hdmi.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_hdmi.c b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
index 3b4120f0626a..59ea1c14eca0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hdmi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hdmi.c
@@ -219,6 +219,8 @@ nouveau_hdmi_mode_set(struct drm_encoder *encoder,
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_connector *nv_connector;
+ struct drm_device *dev = encoder->dev;
+ u32 max_ac_packet, rekey;

nv_connector = nouveau_encoder_connector_get(nv_encoder);
if (!mode || !nv_connector || !nv_connector->edid ||
@@ -227,11 +229,30 @@ nouveau_hdmi_mode_set(struct drm_encoder *encoder,
return;
}

- /* enable hdmi */
- hdmi_mask(encoder, 0x0a4, 0x40000000, 0x40000000);
-
nouveau_hdmi_video_infoframe(encoder, mode);
nouveau_hdmi_audio_infoframe(encoder, mode);

+ hdmi_mask(encoder, 0x0d0, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
+ hdmi_mask(encoder, 0x068, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
+ hdmi_mask(encoder, 0x078, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
+
+ nv_mask(dev, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
+ nv_mask(dev, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
+ nv_mask(dev, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
+
+ /* value matches nvidia binary driver, and tegra constant */
+ rekey = 56;
+
+ max_ac_packet = mode->htotal - mode->hdisplay;
+ max_ac_packet -= rekey;
+ max_ac_packet -= 18; /* constant from tegra */
+ max_ac_packet /= 32;
+
+ /* enable hdmi */
+ hdmi_mask(encoder, 0x0a4, 0x5f1f003f, 0x40000000 | /* enable */
+ 0x1f000000 | /* unknown */
+ max_ac_packet << 16 |
+ rekey);
+
nouveau_audio_mode_set(encoder, mode);
}
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 11 Nov 2011 18:13:13 +1000
Subject: drm/nvd0/disp: send eld to the audio codec

commit 78951d2226e13d4991073f1a81c4dc13aaf4a4fc upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nvd0_display.c | 66 ++++++++++++++++++++++++++++++--
1 file changed, 63 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index 720920796ccb..bfeb17538134 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -773,6 +773,61 @@ nvd0_dac_create(struct drm_connector *connector, struct dcb_entry *dcbe)
}

/************************************************** ****************************
+ * Audio
+ ************************************************** ***************************/
+static void
+nvd0_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
+{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct nouveau_connector *nv_connector;
+ struct drm_device *dev = encoder->dev;
+ int i, or = nv_encoder->or * 0x30;
+
+ nv_connector = nouveau_encoder_connector_get(nv_encoder);
+ if (!drm_detect_monitor_audio(nv_connector->edid))
+ return;
+
+ nv_mask(dev, 0x10ec10 + or, 0x80000003, 0x80000001);
+
+ drm_edid_to_eld(&nv_connector->base, nv_connector->edid);
+ if (nv_connector->base.eld[0]) {
+ u8 *eld = nv_connector->base.eld;
+
+ for (i = 0; i < eld[2] * 4; i++)
+ nv_wr32(dev, 0x10ec00 + or, (i << 8) | eld[i]);
+ for (i = eld[2] * 4; i < 0x60; i++)
+ nv_wr32(dev, 0x10ec00 + or, (i << 8) | 0x00);
+
+ nv_mask(dev, 0x10ec10 + or, 0x80000002, 0x80000002);
+ }
+}
+
+static void
+nvd0_audio_disconnect(struct drm_encoder *encoder)
+{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct drm_device *dev = encoder->dev;
+ int or = nv_encoder->or * 0x30;
+
+ nv_mask(dev, 0x10ec10 + or, 0x80000003, 0x80000000);
+}
+
+/************************************************** ****************************
+ * HDMI
+ ************************************************** ***************************/
+static void
+nvd0_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
+{
+ nvd0_audio_mode_set(encoder, mode);
+}
+
+static void
+nvd0_hdmi_disconnect(struct drm_encoder *encoder)
+{
+ nvd0_audio_disconnect(encoder);
+}
+
+/************************************************** ****************************
* SOR
************************************************** ***************************/
static void
@@ -842,7 +897,8 @@ static void
nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
struct drm_display_mode *mode)
{
- struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
+ struct drm_device *dev = encoder->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
struct nouveau_connector *nv_connector;
@@ -865,6 +921,8 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
or_config = (mode_ctrl & 0x00000f00) >> 8;
if (mode->clock >= 165000)
or_config |= 0x0100;
+
+ nvd0_hdmi_mode_set(encoder, mode);
break;
case OUTPUT_LVDS:
or_config = (mode_ctrl & 0x00000f00) >> 8;
@@ -902,12 +960,12 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,

nvd0_sor_dpms(encoder, DRM_MODE_DPMS_ON);

- push = evo_wait(encoder->dev, 0, 4);
+ push = evo_wait(dev, 0, 4);
if (push) {
evo_mthd(push, 0x0200 + (nv_encoder->or * 0x20), 2);
evo_data(push, mode_ctrl);
evo_data(push, or_config);
- evo_kick(push, encoder->dev, 0);
+ evo_kick(push, dev, 0);
}

nv_encoder->crtc = encoder->crtc;
@@ -932,6 +990,8 @@ nvd0_sor_disconnect(struct drm_encoder *encoder)
evo_kick(push, dev, 0);
}

+ nvd0_hdmi_disconnect(encoder);
+
nv_encoder->crtc = NULL;
nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
}
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 11 Nov 2011 19:51:20 +1000
Subject: drm/nvd0/disp: enable hdmi on sor if hdmi monitor present

commit 64d9cc04ec08d36c2b39f04d4994313d3901a85c upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nvd0_display.c | 44 ++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index bfeb17538134..6c2d6591df1c 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -818,13 +818,57 @@ nvd0_audio_disconnect(struct drm_encoder *encoder)
static void
nvd0_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
+ struct nouveau_connector *nv_connector;
+ struct drm_device *dev = encoder->dev;
+ int head = nv_crtc->index * 0x800;
+ u32 rekey = 56; /* binary driver, and tegra constant */
+ u32 max_ac_packet;
+
+ nv_connector = nouveau_encoder_connector_get(nv_encoder);
+ if (!drm_detect_hdmi_monitor(nv_connector->edid))
+ return;
+
+ max_ac_packet = mode->htotal - mode->hdisplay;
+ max_ac_packet -= rekey;
+ max_ac_packet -= 18; /* constant from tegra */
+ max_ac_packet /= 32;
+
+ /* AVI InfoFrame */
+ nv_mask(dev, 0x616714 + head, 0x00000001, 0x00000000);
+ nv_wr32(dev, 0x61671c + head, 0x000d0282);
+ nv_wr32(dev, 0x616720 + head, 0x0000006f);
+ nv_wr32(dev, 0x616724 + head, 0x00000000);
+ nv_wr32(dev, 0x616728 + head, 0x00000000);
+ nv_wr32(dev, 0x61672c + head, 0x00000000);
+ nv_mask(dev, 0x616714 + head, 0x00000001, 0x00000001);
+
+ /* ??? InfoFrame? */
+ nv_mask(dev, 0x6167a4 + head, 0x00000001, 0x00000000);
+ nv_wr32(dev, 0x6167ac + head, 0x00000010);
+ nv_mask(dev, 0x6167a4 + head, 0x00000001, 0x00000001);
+
+ /* HDMI_CTRL */
+ nv_mask(dev, 0x616798 + head, 0x401f007f, 0x40000000 | rekey |
+ max_ac_packet << 16);
+
nvd0_audio_mode_set(encoder, mode);
}

static void
nvd0_hdmi_disconnect(struct drm_encoder *encoder)
{
+ struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+ struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
+ struct drm_device *dev = encoder->dev;
+ int head = nv_crtc->index * 0x800;
+
nvd0_audio_disconnect(encoder);
+
+ nv_mask(dev, 0x616798 + head, 0x40000000, 0x00000000);
+ nv_mask(dev, 0x6167a4 + head, 0x00000001, 0x00000000);
+ nv_mask(dev, 0x616714 + head, 0x00000001, 0x00000000);
}

/************************************************** ****************************
--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 11 Nov 2011 23:39:22 +1000
Subject: drm/nvd0/disp: update crtc timing calculations for interlace/doublescan

commit 2d1d898b4684ab86fb27ece7d69e4e145a7be9d2 upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nvd0_display.c | 52 +++++++++++++++++++++-----------
1 file changed, 34 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index 6c2d6591df1c..99873fc24c92 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -346,21 +346,35 @@ nvd0_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
{
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
struct nouveau_connector *nv_connector;
- u32 htotal = mode->htotal;
- u32 vtotal = mode->vtotal;
- u32 hsyncw = mode->hsync_end - mode->hsync_start - 1;
- u32 vsyncw = mode->vsync_end - mode->vsync_start - 1;
- u32 hfrntp = mode->hsync_start - mode->hdisplay;
- u32 vfrntp = mode->vsync_start - mode->vdisplay;
- u32 hbackp = mode->htotal - mode->hsync_end;
- u32 vbackp = mode->vtotal - mode->vsync_end;
- u32 hss2be = hsyncw + hbackp;
- u32 vss2be = vsyncw + vbackp;
- u32 hss2de = htotal - hfrntp;
- u32 vss2de = vtotal - vfrntp;
+ u32 ilace = (mode->flags & DRM_MODE_FLAG_INTERLACE) ? 2 : 1;
+ u32 vscan = (mode->flags & DRM_MODE_FLAG_DBLSCAN) ? 2 : 1;
+ u32 hactive, hsynce, hbackp, hfrontp, hblanke, hblanks;
+ u32 vactive, vsynce, vbackp, vfrontp, vblanke, vblanks;
+ u32 vblan2e = 0, vblan2s = 1;
+ u32 magic = 0x31ec6000;
u32 syncs, *push;
int ret;

+ hactive = mode->htotal;
+ hsynce = mode->hsync_end - mode->hsync_start - 1;
+ hbackp = mode->htotal - mode->hsync_end;
+ hblanke = hsynce + hbackp;
+ hfrontp = mode->hsync_start - mode->hdisplay;
+ hblanks = mode->htotal - hfrontp - 1;
+
+ vactive = mode->vtotal * vscan / ilace;
+ vsynce = ((mode->vsync_end - mode->vsync_start) * vscan / ilace) - 1;
+ vbackp = (mode->vtotal - mode->vsync_end) * vscan / ilace;
+ vblanke = vsynce + vbackp;
+ vfrontp = (mode->vsync_start - mode->vdisplay) * vscan / ilace;
+ vblanks = vactive - vfrontp - 1;
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+ vblan2e = vactive + vsynce + vbackp;
+ vblan2s = vblan2e + (mode->vdisplay * vscan / ilace);
+ vactive = (vactive * 2) + 1;
+ magic |= 0x00000001;
+ }
+
syncs = 0x00000001;
if (mode->flags & DRM_MODE_FLAG_NHSYNC)
syncs |= 0x00000008;
@@ -373,20 +387,22 @@ nvd0_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,

push = evo_wait(crtc->dev, 0, 64);
if (push) {
- evo_mthd(push, 0x0410 + (nv_crtc->index * 0x300), 5);
+ evo_mthd(push, 0x0410 + (nv_crtc->index * 0x300), 6);
evo_data(push, 0x00000000);
- evo_data(push, (vtotal << 16) | htotal);
- evo_data(push, (vsyncw << 16) | hsyncw);
- evo_data(push, (vss2be << 16) | hss2be);
- evo_data(push, (vss2de << 16) | hss2de);
+ evo_data(push, (vactive << 16) | hactive);
+ evo_data(push, ( vsynce << 16) | hsynce);
+ evo_data(push, (vblanke << 16) | hblanke);
+ evo_data(push, (vblanks << 16) | hblanks);
+ evo_data(push, (vblan2e << 16) | vblan2s);
evo_mthd(push, 0x042c + (nv_crtc->index * 0x300), 1);
evo_data(push, 0x00000000); /* ??? */
evo_mthd(push, 0x0450 + (nv_crtc->index * 0x300), 3);
evo_data(push, mode->clock * 1000);
evo_data(push, 0x00200000); /* ??? */
evo_data(push, mode->clock * 1000);
- evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 1);
+ evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 2);
evo_data(push, syncs);
+ evo_data(push, magic);
evo_kick(push, crtc->dev, 0);
}

--
1.7.10.4

From: Ben Skeggs <bskeggs@redhat.com>
Date: Thu, 6 Oct 2011 13:29:05 +1000
Subject: drm/nouveau: add overscan compensation connector properties

commit b29caa5885e85bbda7c84ea55721b9e79718583a upstream.

Exposes the same connector properties as the Radeon implementation, however
their behaviour isn't exactly the same. The primary difference being that
unless both hborder/vborder have been defined by the user, the driver will
keep the aspect ratio of the overscanned area the same as the mode the
display is programmed for.

Enabled for digital outputs on GeForce 8 and up, excluding GF119.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_connector.c | 78 ++++++++++++++++++--
drivers/gpu/drm/nouveau/nouveau_connector.h | 5 +-
drivers/gpu/drm/nouveau/nouveau_drv.h | 10 +++
drivers/gpu/drm/nouveau/nouveau_state.c | 37 +++++++++-
drivers/gpu/drm/nouveau/nv50_crtc.c | 105 ++++++++++++++++-----------
5 files changed, 181 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 1e72db509ebb..b573dd40ff71 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -420,15 +420,21 @@ static int
nouveau_connector_set_property(struct drm_connector *connector,
struct drm_property *property, uint64_t value)
{
+ struct drm_nouveau_private *dev_priv = connector->dev->dev_private;
+ struct nouveau_display_engine *disp = &dev_priv->engine.display;
struct nouveau_connector *nv_connector = nouveau_connector(connector);


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