Bug#597358: drm/radeon/kms: prefer high post dividers in legacy pll algo
 

From: Alex Deucher <alexdeucher@gmail.com>
Date: Wed, 29 Sep 2010 11:37:39 -0400

commit bcac54da0a6bd2ed93a2a70fe3d4ebc08c4ed779 upstream.

the hw prefers higher post dividers

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
---
drivers/gpu/drm/radeon/radeon_display.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 22ed2171c67e..60a51dced9d1 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -464,7 +464,7 @@ void radeon_compute_pll(struct radeon_pll *pll,
max_fractional_feed_div = pll->max_frac_feedback_div;
}

- for (post_div = min_post_div; post_div <= max_post_div; ++post_div) {
+ for (post_div = max_post_div; post_div >= min_post_div; --post_div) {
uint32_t ref_div;

if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
--
1.7.6




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