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Old 03-20-2012, 05:52 AM
"Suzuki K. Poulose"
 
Default Support E500 processor for FSL BOOKE

On 03/19/2012 03:17 PM, Toshikazu Nakayama wrote:
> This patch add support fleescale ppce500mc in E500 processor chipset.
> And make platform specific code shape-up so that new support can get easy.
>
Toshikazu Nakayama-san,

The patches look good to me.

> + if (machdep->flags & PAE)
> pte = ULONGLONG(machdep->ptbl + PAGEOFFSET((ulong)page_table));
May be we could introduce a macro to replace

(machdep->flags & PAE)
There are quite a lot of places where we use it now.

Something like,

#define IS_PAE() (machdep->flags & PAE)


What do you think ?

Reviewed-by: Suzuki K. Poulose <suzuki@in.ibm.com>

Thanks
Suzuki

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Old 03-21-2012, 03:53 AM
Toshikazu Nakayama
 
Default Support E500 processor for FSL BOOKE

(2012/03/20 15:52), Suzuki K. Poulose wrote:
> On 03/19/2012 03:17 PM, Toshikazu Nakayama wrote:
>> This patch add support fleescale ppce500mc in E500 processor chipset.
>> And make platform specific code shape-up so that new support can get easy.
>>
> Toshikazu Nakayama-san,
>
> The patches look good to me.
>
>> + if (machdep->flags& PAE)
>> pte = ULONGLONG(machdep->ptbl + PAGEOFFSET((ulong)page_table));
> May be we could introduce a macro to replace
>
> (machdep->flags& PAE)
> There are quite a lot of places where we use it now.
>
> Something like,
>
> #define IS_PAE() (machdep->flags& PAE)
>
>
> What do you think ?
>
> Reviewed-by: Suzuki K. Poulose<suzuki@in.ibm.com>

Suzuki-san,

Thanks for your review and your proposal is good for me.
I'm going to add your suggestion in next patch set that
are also updating ppc32 MMU's implementation.

Thanks,
Toshi

> Thanks
> Suzuki
>
>

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